Other Parts Discussed in Thread: C2000WARE
i have a problem using the SPI with FIFOs. I configured the SPI (Master, 500kbit, 16bit size), i can send data out of the FIFO and see that i get response from SPI slave drv5383 on my Logic Analyzer.
The RXFIFO seems to fill up and the Interrupt Flag RXFFINT is set. But my Interrupt routine is not triggered.
As from the Technical Reference Guide the SPIINTENA Enable is 0 for FIFO operation, is this right?
The rxFIFO Interrupt routine is mapped to INT_SPIA_RX.
I'am writing the Data to the txFIFO not in the interrupt routine, can this cause a problem?