Hello,
This is the 2nd time we post this question. Kindly give it some attention.
We are implementing TIDM-02008 (Bidirectional Interleaved CCM Totem Pole Bridgeless PFC Reference Design Using C2000 MCU). Questions are;
- In PFC mode DC Bus Control; the reference .pdf of that design shows (Labs 3 & 4 and Figure 2.9) that we can control current to cope with load changes. That document also shows (Figure 2.11) that the output DC voltage can be controlled/regulated while maintaining low-bandwidth response (~10 Hz). What is the permissible range of that DC voltage change? Can we take that DC voltage to say 5% of the input AC voltage? If not, what is the barrier?
- Number of switches. We can use only 4 power switches (GaN , MOSFET or SicMOSFET) to realize DC voltage level control and PFC of single-phase AC input. Two control variables to control two outputs. Correct? In your reference design you use 8 power switches (6 GaN switches and 2 MOSFETs) all to realize interleaving and reduce the ripple. Correct?
- Three-Phase PWM 2-Level PFC. Does Texas Instruments have an explicit three-phase PFC reference design that uses 6 power switches? Vienna configuration is not justified in our case.We are seeking a reference design similar to the concept described in the reference document Microsoft PowerPoint - 3 phase PFC and APF application with TI C2000 MCU.pptx (21ic.com)
Regards
Sam Refaat
