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TMS320F28386D: Peripheral frame documentation

Part Number: TMS320F28386D


Is there any explanations on how the peripheral frame works ?

I am trying to see how it arbitrates between DMA or CLA for example in case both try to access two different peripheral in the same frame, e.g. DMA accessing FSI peripheral registers and CLA accessing SPI peripheral registers.

This is in order to identify the potential interference channels which could act on the worst case execution time.

Best regards,