TMS320F28388D: Initial self-tests for available Sigma Delta ADCs...

Nenad,

SDFM module is not analog peripheral, it is digital peripheral which works on SDCLK and SD-DATA as input to the module. So, you cannot feed analog input directly to SDFM module.

SD-modulator is one which is fed in analog input and outputs CLK and DATA which is fed to SDFM.

Regards,

Manoj

Dear Manoj,

I am aware that SDFM module is not an analog peripheral. However, I thought that you have already available an example showcasing an easy way to generate the Input digital bit-stream for the SDFM module (aimed for initial self-test of the MCU subsystems): either by external loopback employing internal DAC output driving an external modulator, or by digitally generated signal, i.e. by sigma-delta modulator implemented within MCU, or within an accompanying programmable logic (e.g. PLD variants intended for such built-in self-tests, based on CORDIC algorithm, whose output is routed back to the SDFM input). SDFM clock input can be generated internally (e.g. by properly routed EPWM output), isn't it?

Best regards

Nenad  

Nenad,

Nenad Tezak said:

However, I thought that you have already available an example showcasing an easy way to generate the Input digital bit-stream for the SDFM module (aimed for initial self-test of the MCU subsystems):

No, unfortunately we don't such ready made examples which would directly fit your self test need.

We however have 6 different SDFM examples available in C2000Ware. You should be able modify any of these examples for your requirement.

Nenad Tezak said:

SDFM clock input can be generated internally (e.g. by properly routed EPWM output), isn't it?

Yes, PWM (20 MHz) can be generated and externally routed back as SD-Cx and sent to SD-modulator. This is how many of our customer use it.

One easy self test which you can develop is have SD-Cx fed with PWM output (20MHz) clock and have Pull-up (or) Pull-down on SD-Dx pin. This way you can swing between +ve maximum and -ve minimum in your filter output.

Regards,

Manoj

Manoj,

thanks for confirmation regarding possible self-test implementation. However, there are several other points related to SDFM subsystem (available within TMS320F28388D):

1.  What is the purpose of SincFast filter type (with respect to existing Sinc2 filter type)?
SincFast is declared as a third-order filter type  (Table 28-2 of the TMS320F2838x TRM, https://www.ti.com/lit/ug/spruii0c/spruii0c.pdf ), thus featuring larger latency (for the same data rate of the Sinc filter, i.e. ratio of  SD modulator frequency and OSR, yet having (in my opinion) inferior frequency response (compared to Sinc2, according to Figure 28-9 of the same TRM). Is it all about the ENOB or some other feature of that filter type?

2.  If requirement on the Sinc filter latency (of the employed configuration), is defined as less than 4 µs, would the following configuration (modulator data rate 20MHz ; OSR=32, second-order filter type, i.e. Sinc2) meet such requirement? If I am right such configuration should yield latency time around 3.2 microseconds. This puzzles me since mentioned modulator data frequency (20MHz) corresponds to the related characteristics of the AMC1305L25-Q1 or other similar DS modulators, whose declared latency times were significantly larger (cca 20 up to 50µs, with respect to the Sincx filter order employed). 
Note: 16-bit representation of results is also required, i.e. values span within ±32768 range

3. What is the maximal allowed/recommended modulator data rate (if fsysclk=200MHz is assumed)?

4. Regarding Comparator (Secondary) Filter Unit (Section 28.8 , page 3081/5269 of the same TRM) introductory lines: 
"Most control systems require protection of the system by tripping the PWM in case the current or voltage goes out of bounds. The primary purpose of the secondary (comparator) filter is to allow the user to monitor input conditions with a fast settling time. This allows the user to trip PWMs to protect the system from potential damage."
contain rather loose remark "fast settling time", without specifying any typical value for that characteristics - in (sub)microseconds range...

5. Related to Comparator (Secondary) Filter Unit: Effective resolution of the comparator filter (ENOB) depends upon the comparator filter type, COSR and sigma-delta modulator frequency, of course. It would be appreciated if you could specify an example of configuration (COSR, Sinc filter type and modulator frequency), suitable to achieve certain ENOB requirements (e.g. ENOB~14-bits, i.e. SNR~85dB), including corresponding latency time.
 

Best regards

Nenad

Nenad Tezak said:

1.  What is the purpose of SincFast filter type (with respect to existing Sinc2 filter type)?
SincFast is declared as a third-order filter type  (Table 28-2 of the TMS320F2838x TRM, https://www.ti.com/lit/ug/spruii0c/spruii0c.pdf ), thus featuring larger latency (for the same data rate of the Sinc filter, i.e. ratio of  SD modulator frequency and OSR, yet having (in my opinion) inferior frequency response (compared to Sinc2, according to Figure 28-9 of the same TRM). Is it all about the ENOB or some other feature of that filter type?

SincFast  provides better ENOB than Sinc2 filter. The frequency response provided in TRM doesn't look correct. I shall correct it in next release of TRM.

Nenad Tezak said:

2.  If requirement on the Sinc filter latency (of the employed configuration), is defined as less than 4 µs, would the following configuration (modulator data rate 20MHz ; OSR=32, second-order filter type, i.e. Sinc2) meet such requirement? If I am right such configuration should yield latency time around 3.2 microseconds. This puzzles me since mentioned modulator data frequency (20MHz) corresponds to the related characteristics of the AMC1305L25-Q1 or other similar DS modulators, whose declared latency times were significantly larger (cca 20 up to 50µs, with respect to the Sincx filter order employed). 
Note: 16-bit representation of results is also required, i.e. values span within ±32768 range

Your latency calculations are correct!

For Sinc2 filter:

Order = 2

SD-Cx frequency = 20 MHz

COSR = 32

Data rate = COSR / SD-Cx = 32 / (20 MHz) = 1.6 us

Latency = Order x Data rate = 2 x 1.6 us = 3.2 us.

In AMC1305L25 DS, latency is mentioned as settling time. Sinc2 with OSR = 32 corresponds to around ~8 ENOBs. (Figure 53. Measured Effective Number of Bits versus Oversampling Ratio) In Figure 55 (Measured Effective Numberof Bits versus Settling Time), for 3.2 us settling time, it corresponds to around ~8 ENOBs. So, I don't agree with significantly larger latency time like 20 us.

Nenad Tezak said:

3. What is the maximal allowed/recommended modulator data rate (if fsysclk=200MHz is assumed)?

22 MHz

Nenad Tezak said:

4. Regarding Comparator (Secondary) Filter Unit (Section 28.8 , page 3081/5269 of the same TRM) introductory lines: 
"Most control systems require protection of the system by tripping the PWM in case the current or voltage goes out of bounds. The primary purpose of the secondary (comparator) filter is to allow the user to monitor input conditions with a fast settling time. This allows the user to trip PWMs to protect the system from potential damage."
contain rather loose remark "fast settling time", without specifying any typical value for that characteristics - in (sub)microseconds range...

It is generally mentioned as "fast settling time" because setting time (or) latency of Sinc filter is variable which depends upon SD-modulator frequency, COSR settings, Filter order.

Nenad Tezak said:

5. Related to Comparator (Secondary) Filter Unit: Effective resolution of the comparator filter (ENOB) depends upon the comparator filter type, COSR and sigma-delta modulator frequency, of course. It would be appreciated if you could specify an example of configuration (COSR, Sinc filter type and modulator frequency), suitable to achieve certain ENOB requirements (e.g. ENOB~14-bits, i.e. SNR~85dB), including corresponding latency time.

Max OSR settings of comparator filter is 32. With this OSR settings you cannot achieve 14-bits of ENOB. In AMC1305L25, you would need Sinc3 filter type with OSR setting of 256 to achieve around 14 bits of ENOB with setting time of 25.6 us.

Regards,

Manoj