Hi All,
in table 6.1, section Power and Ground of the datasheet is written:
VDD --> TI recommends placing a decoupling capacitor near each VDD pin with a minimum total capacitance of approximately 20 µF. (pg.26 datasheet)
This means that a 5uF decoupling capacitor must be placed on each VDD pin. Can you confirm?
While for VDDIO_SW --> If the internal DC-DC regulator is used, a bulk input capacitance of 20-µF should be placed on this pin. (pg.26 datasheet)
This means that 20uF bulk cap must be placed on each VDDIO_SW. Correct?
Thanks
RV