SM320F28335-EP: Power up sequence.

Marek,

Even though XRSn is an asynchronous signal, it still requires some finite time to propagate through the device to properly reset all the logic in the device before being released. The 1.5V is important because that is the point that we can reliably guarantee the internal logic will function and pass this signal.

Keep in mind that the Vmin for this device is 1.71V, so XRSn should not be released until that condition is met regardless of the above note, but the above is to make sure in case the ramp rate is such that 1ms has not elapsed between 1.5V and 1.71V/XRSn release we give guidance due to the previously mentioned prop time.

If this is not followed, there is a risk that not all logic will be in its reset state when the device begins to execute boot code, which could in turn cause unexpected behavior from the system.

Best,

Matthew