I am currently trying to implement a timer interrupt to service a watchdog reset. I set up the watch dog to 1.31072 mSecs and a timer interrupt of 1mSec. However, when testing to ensure the WD was resetting the F2808, I set the timer interrupt to > WD value of 1.31072 mSecs and there was no reset. Seems I have to set the timer interrupt to a magnitude of 10x greater than the WD value so I believe the WD value was not calculated correctly.
Why does the timer interrupt need to be 10x greater than WD - what am I missing in calculation? (I believe the OSCCLK is INCLK value of 100MHz)
/* WDCR
* Bits Field Description
* 15-8 Reserved
* 7 WDFLAG Watchdog reset status flag bit
* 6 WDDIS Watchdog disable bit 1 = Disable
* 5-3 WDCHK Watchdog check. ALWAYS write 1,0,1 or a reset will occur
* 2-0 WDPS Watchdog pre-scale.
* 000 WDCLK = OSCCLK/512/1 (default)
* 001 WDCLK = OSCCLK/512/1
* 010 WDCLK = OSCCLK/512/2
* 011 WDCLK = OSCCLK/512/4
* 100 WDCLK = OSCCLK/512/8
* 101 WDCLK = OSCCLK/512/16
* 110 WDCLK = OSCCLK/512/32
* 111 WDCLK = OSCCLK/512/64
* Enable 0x0028
* 0000 0000 00'10 1'000
* OSCCLK PS 100/(512*PS) 1 WD Clk WD Reset Timeout after 256 WD Clks
* 100,000,000 1 195312.5 0.00000512 0.00131072 <-- Expected reset time if no WDKEY update
* 2 97656.25 0.00001024 0.00262144
* 4 48828.125 0.00002048 0.00524288
* 8 24414.063 0.00004096 0.01048576
* 16 12207.031 0.00008192 0.02097152
* 32 6103.5156 0.00016384 0.04194304
* 64 3051.7578 0.00032768 0.08388608
*/
void EnableDog(void)
{
EALLOW;
SysCtrlRegs.WDCR= 0x0028; // Prescale (WDPS) of 100M/512/2 so value should be 0.00131072
EDIS;
}
ConfigCpuTimer(&CpuTimer0, 100, 13200); // 13.2mSec to trip watchdog???
void ConfigCpuTimer(struct CPUTIMER_VARS *Timer, float Freq, float Period)
{
Uint32 temp;
// Initialize timer period:
Timer->CPUFreqInMHz = Freq;
Timer->PeriodInUSec = Period;
temp = (long) (Freq * Period);
Timer->RegsAddr->PRD.all = temp;
// Set pre-scale counter to divide by 1 (SYSCLKOUT):
Timer->RegsAddr->TPR.all = 0;
Timer->RegsAddr->TPRH.all = 0;
// Initialize timer control register:
Timer->RegsAddr->TCR.bit.TSS = 1; // 1 = Stop timer, 0 = Start/Restart Timer
Timer->RegsAddr->TCR.bit.TRB = 1; // 1 = reload timer
Timer->RegsAddr->TCR.bit.SOFT = 1;
Timer->RegsAddr->TCR.bit.FREE = 1; // Timer Free Run
Timer->RegsAddr->TCR.bit.TIE = 1; // 0 = Disable/ 1 = Enable Timer Interrupt
// Reset interrupt counter:
Timer->InterruptCount = 0;
}