TMS320F28032: When the CPU responds to multiple interrupt sources, is it possible to mask high-priority response operations?

Shaoxing,

This would not be compatible with the hardware state machine that handles interrupts. For custom behavior, the user would need to implement a software-based prioritization scheme similar to what is done for nested interrupts: https://software-dl.ti.com/C2000/docs/c28x_interrupt_nesting/html/index.html#adding-simple-software-prioritization-nesting

-Tommy