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TMS320F28388D: Master Core Selection for EMIF1

Part Number: TMS320F28388D

Hi all.

We developing the control board with F28388D.

We will use EMIF1 by CPU1 and CPU2(shared).

But we can't select CPU2 as master(Emif1ConfigRegs.EMIF1MSEL <- 0x93A5CE72).

What to do for us purpose.

Regards,

Masahiro

  • Hi,

    But we can't select CPU2 as master(Emif1ConfigRegs.EMIF1MSEL <- 0x93A5CE72).

    I am not clear on this one. What do you mean by you can not select CPU2 as master ? Do you mean code you have is not working ? Can you post the code snapshot here and also from which CPU code you are changing the ownership ?

    Regards,

    Vivek Singh

  • Hi Vivek Singh,

    Thank you for your reply.

    > What do you mean by you can not select CPU2 as master ?
     Yes.

    > Do you mean code you have is not working ?
     Yes. And I tried write the value(0x93A5CE72) with CCS@CPU1 direct, but not changed here(I expected it to turn 0x00000002).
     By the way, other patterns change as expected.
      Write Value -> Read Back Value
      0x93A5CE70  -> 0x00000000
      0x93A5CE71  -> 0x00000001
      0x93A5CE73  -> 0x00000003

    > Can you post the code snapshot here and also from which CPU code you are changing the ownership ?
     Yes. Below cords were run on CPU1.
     cpu == 1 -> OK
     cpu == 2 -> NG

        EALLOW;
            //
            //    Owner Set
            // Grab EMIF1 For CPUn
            //
            Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE70 | cpu;    //    cpu is 1 or 2
        EDIS;

     We referenced spruii0b.

     But EMIF1MSEL register was deleted on spruii0c.

    Regards,

    Masahiro

  • Hi,

    This is SEMAPHORE register and CPU can only grab it for for their own use. CPU1 can not grab ownership for CPU2. You need to do that from CPU2 code. Please try that and it should work.

    Regards,

    Vivek Singh

  • Hi,

    Thanks for your advice.

    Our problem was resolved.

    But, the documentation has some problem. I think.

    Best regards,

    Masahiro