Other Parts Discussed in Thread: C2000WARE
Hi,
This is a continuation of the support case "">e2e.ti.com/.../3851239. As per the closure of the case, we were able to flash the device. However on further notice, it was observed that the RAM and Flash execution times are different (total activity time indicated by a GPIO Toggling). Flash its taking more time and loops went wrong. How can I copy the entire code from Flash to RAM after power-on and start execution from RAM to avoid any timing uncertainties. I am including the RAM linker file content in case its required. The default RAM linker file is modified as follows.
MEMORY
{
PAGE 0 :
BEGIN : origin = 0x000000, length = 0x000002
//RAMM0: origin = 0x0000F5, length = 0x00030B // Default
RAMM0 : origin = 0x0000F5, length = 0x00060B // Modified
RAMLS : origin = 0x008000, length = 0x003000 // Added
//RAMLS0 : origin = 0x008000, length = 0x000800 // Removed
//RAMLS1 : origin = 0x008800, length = 0x000800 // Removed
//RAMLS2 : origin = 0x009000, length = 0x000800 // Removed
//RAMLS3 : origin = 0x009800, length = 0x000800 // Removed
//RAMLS4 : origin = 0x00A000, length = 0x000800 // Removed
RESET : origin = 0x3FFFC0, length = 0x000002
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x0000F3
//RAMM1 : origin = 0x000400, length = 0x000400 // Default
RAMM1 : origin = 0x000700, length = 0x000200 // Modified
//RAMLS5 : origin = 0x00A800, length = 0x000800 // Default
//RAMLS6 : origin = 0x00B000, length = 0x000800 // Default
RAMLS5 : origin = 0x00A800, length = 0x000B00 // Modified
RAMLS6 : origin = 0x00B300, length = 0x000500 // Modified
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x002000
RAMGS1 : origin = 0x00E000, length = 0x002000
RAMGS2 : origin = 0x010000, length = 0x002000
RAMGS3 : origin = 0x012000, length = 0x002000
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
.TI.ramfunc : > RAMM0 PAGE = 0
.text : >>RAMM0 | RAMLS , PAGE = 0 // Modified
//.text : >>RAMM0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0 // Default
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS5, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
}
Thanks and Regards
Karthik R