TMS320F280048-Q1: TZ could not shut the PWM every time

Hi Jane,

Can you tell that where are you clearing the EPWM TZ flags, is it inside the TZ interrupt?

Also, it'll be helpful it you can share the initialization part of the code.

I'll recommend you to check and run the epwm_ex4_digital_compare available with C2000Ware incase you have not checked that out.

Aditya

void InitCMPSS1(void)
{
    //     =========================================================================================
    //#####||                               Analog Group1 Connections                             ||#####//
    //     =========================================================================================
    //     ||PIN NAME|| ||PIN NUM|| ||                           CMP1 (MUX)                       ||
    //     ||        || ||       || ||  |HIGHPOSITIVE| |HIGHNEGATIVE| |LOWPOSITIVE| |LOWNEGATIVE| ||
    //     ||   C0   || ||   12  || ||  |HPMXSEL = 1 | |------------| |LPMXSEL = 1| |-----------| ||
    //     =========================================================================================

    //---------------------------
    //| CMPHPMXSEL[CMP1HPMXSEL] | ->Select the value for CMPHPMXSEL
    //---------------------------
    EALLOW;
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1, 1);//C0[PIN12] -> > CMP1_HP1

    //---------------------------
    //| CMPLPMXSEL[CMP1LPMXSEL] | -> Select the value for CMPLPMXSEL
    //---------------------------
//    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1, 1);//C0[PIN12] -> -> CMP1_LP1

    //     ====================================
    //#####||  Comparator Subsystem (CMPSS1) ||#####//
    //     ====================================

    //====================
    //|| Ramp Generator || -> Configures the comparator subsystem's ramp generator
    //====================
//    CMPSS_configRamp(CMPSS1_BASE,
//                     0,  //uint16_t maxRampVal
//                     0,     //uint16_t decrementVal
//                     0,     //uint16_t delayVal
//                     3,     //uint16_t pwmSyncSrc: 1 EPWM1SYNCO
//                     true  //bool useRampValShdw
//                     );
    //CMPSS_setMaxRampValue(CMPSS1_BASE, 0);

    //----------
    //|DACHVALS| -> Sets the value of the internal DAC of the high comparator
    //----------
    CMPSS_setDACValueHigh(CMPSS1_BASE, ADCVAL_VBAT_OVER_THR_CMPSS);//18V(contains 0.33V offset,the real value is (18-0.33)V )

    //----------
    //|DACLVALS| -> Sets the value of the internal DAC of the low comparator
    //----------
//    CMPSS_setDACValueLow(CMPSS1_BASE, ADCVAL_VBAT_LMT_THR_CMPSS);//22V(contains 0.33V offset,the real value is (22-0.33)V )

    //=========================================
    //|| Reference DACH & DACL Configuration ||
    //=========================================
    //| COMPDACCTL[SWLOADSEL] | -> specify when the DAC value is loaded from its shadow register
    //| COMPDACCTL[SELREF] | -> specify which voltage supply is used as reference for the DACs
    //| COMPDACCTL[DACSOURCE] | ->  specify the high comparator negative input source

    CMPSS_configDAC(CMPSS1_BASE,
                    CMPSS_DACVAL_SYSCLK |
                    CMPSS_DACREF_VDDA |
                    CMPSS_DACSRC_SHDW);

    //==================================================
    //||Sets the configuration for the high comparator||
    //==================================================
    //| COMPCTL[COMPHSOURCE] | -> specify the high comparator negative input source
    //| COMPCTL[COMPHINV] | -> config if the comparator output should be inverted
    //| COMPCTL[ASYNCHEN] | -> config if the asynchronous comparator output
    CMPSS_configHighComparator(CMPSS1_BASE,
                               CMPSS_INSRC_DAC|
                               CMPSS_INV_INVERTED);


    //==================================================
    //||Sets the configuration for the low comparator||
    //==================================================
    //| COMPCTL[COMPLSOURCE] | -> specify the low comparator negative input source
    //| COMPCTL[COMPLINV] | -> config if the comparator output should be inverted
    //| COMPCTL[ASYNCLEN] | -> config if the asynchronous comparator output
//    CMPSS_configLowComparator(CMPSS1_BASE,
//                              CMPSS_INSRC_DAC);

    //==========================================================
    //|| Configures the digital filter of the high comparator ||
    //==========================================================
    //CTRIPHFILCLKCTL[CLKPRESCALE] -> samplePrescale is the number of system clock cycles between samples
    //CTRIPHFILCTL[SAMPWIN] -> sampleWindow is the number of FIFO samples to monitor
    //CTRIPHFILCTL[THRESH] -> threshold is the majority threshold of samples to change state
    CMPSS_configFilterHigh(CMPSS1_BASE,
                           2,//10,//125,     //uint16_t samplePrescale
                           20,//16,      //uint16_t sampleWindow
                           15       //uint16_t threshold
                           );

    //==========================================================
    //|| Configures the digital filter of the low comparator ||
    //==========================================================
    //CTRIPLFILCLKCTL[CLKPRESCALE] -> samplePrescale is the number of system clock cycles between samples
    //CTRIPLFILCTL[SAMPWIN] -> sampleWindow is the number of FIFO samples to monitor
    //CTRIPLFILCTL[THRESH] -> threshold is the majority threshold of samples to change state
//    CMPSS_configFilterLow(CMPSS1_BASE,
//                          10,//100,      //uint16_t samplePrescale
//                          30,//30       //uint16_t sampleWindow
//                          28  //24      //uint16_t threshold
//                          );

    //----------------------------
    //| CTRIPHFILCLKCTL[FILINIT] | -> Initializes the digital filter of the high comparator
    //----------------------------
    CMPSS_initFilterHigh(CMPSS1_BASE);

    //----------------------------
    //| CTRIPLFILCLKCTL[FILINIT] | -> Initializes the digital filter of the low comparator
    //----------------------------
//    CMPSS_initFilterLow(CMPSS1_BASE);

    //-----------------------------------
    //| COMPCTL[CTRIPHSEL,CTRIPOUTHSEL] | -> Sets the output signal configuration for the high comparator
    //-----------------------------------
    CMPSS_configOutputsHigh(CMPSS1_BASE,
                            CMPSS_TRIP_FILTER |
                            CMPSS_TRIPOUT_FILTER);

    //-----------------------------------
    //| COMPCTL[CTRIPLSEL,CTRIPOUTLSEL] | -> Sets the output signal configuration for the low comparator
    //-----------------------------------
//    CMPSS_configOutputsLow(CMPSS1_BASE,
//                           CMPSS_TRIP_LATCH |
//                           CMPSS_TRIPOUT_LATCH);

    //---------------------
    //| COMPCTL[COMPDACE] | -> Enables the CMPSS module
    //---------------------
    CMPSS_enableModule(CMPSS1_BASE);
EDIS;
}


void setupBoardProtection(uint32_t base1, uint32_t base2, uint32_t base3)
{
EALLOW;
    //
    // Disable all the muxes first
    //
//    XBAR_setOutputMuxConfig(XBAR_OUTPUT5, XBAR_OUT_MUX12_CMPSS7_CTRIPOUTH);//when CMPss5H is high means output voltage>16V
//    XBAR_enableOutputMux(XBAR_OUTPUT5,XBAR_MUX12);
//    XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX08_CMPSS5_CTRIPH);//when CMPss5H is high means output voltage>16V
//    XBAR_enableEPWMMux(XBAR_TRIP9,XBAR_MUX06);
//        XBAR_enableEPWMMux(XBAR_TRIP10, 0x00);
//        XBAR_setEPWMMuxConfig(XBAR_TRIP10, XBAR_EPWM_MUX13_CMPSS7_CTRIPL);//CMPSS5L output over voltage protection
//        XBAR_enableEPWMMux(XBAR_TRIP10, XBAR_MUX13);
//    EPWM_selectDigitalCompareTripInput(EPWM6_BASE, EPWM_DC_TRIP_TRIPIN10, EPWM_DC_TYPE_DCBH);//trip7 primary current/output OV OC protection
//    EPWM_setTripZoneDigitalCompareEventCondition(EPWM6_BASE, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXH_HIGH);//trip7 primary current/output OV OC protection
//    EPWM_setDigitalCompareEventSource(EPWM6_BASE, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);//trip7 primary current/output OV OC protection
//    EPWM_enableTripZoneSignals(EPWM6_BASE, EPWM_TZ_SIGNAL_DCBEVT1);//one shot for Trip7 primary current protection
//    EPWM_setTripZoneAction(EPWM6_BASE, EPWM_TZ_ACTION_EVENT_TZA,EPWM_TZ_ACTION_LOW);
//    EPWM_setTripZoneAction(EPWM6_BASE, EPWM_TZ_ACTION_EVENT_TZB,EPWM_TZ_ACTION_HIGH);



    XBAR_setEPWMMuxConfig(XBAR_TRIP9, XBAR_EPWM_MUX06_CMPSS4_CTRIPH);//when CMPss4H is high means output Current<5A
//    XBAR_setEPWMMuxConfig(XBAR_TRIP9, XBAR_EPWM_MUX00_CMPSS1_CTRIPH);//when CMPss1H is high means output voltage>17V
    XBAR_setEPWMMuxConfig(XBAR_TRIP9, XBAR_EPWM_MUX08_CMPSS5_CTRIPH);//when CMPss5H is high means output voltage>17V
    EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_TRIPIN9, EPWM_DC_TYPE_DCBL);
    EPWM_setTripZoneDigitalCompareEventCondition(base3, EPWM_TZ_DC_OUTPUT_B2, EPWM_TZ_EVENT_DCXL_HIGH);//DCBEVT2
    EPWM_setDigitalCompareEventSource(base3, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_enableTripZoneSignals(base3, EPWM_TZ_SIGNAL_DCBEVT2);
    EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_DCBEVT2,EPWM_TZ_ACTION_LOW);//DCBEVT2->output current low will turn off PWM5A/5B

    //---------------------------
    //| TRIPxMUXENABLE(32 bits) | -> enable the mux in
    //---------------------------
    XBAR_enableEPWMMux(XBAR_TRIP9,XBAR_MUX06);
//    XBAR_enableEPWMMux(XBAR_TRIP9,XBAR_MUX00);
    XBAR_enableEPWMMux(XBAR_TRIP9,XBAR_MUX08);

    //---------------------
    //| TRIPOUTINV(1 bit) | -> invert the signal via
    //---------------------
    XBAR_invertEPWMSignal(XBAR_TRIP9,false);


    XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX00_CMPSS1_CTRIPH);//when CMPss1H is high means battery voltage<4V
    XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX08_CMPSS5_CTRIPH);//when CMPss5H is high means output voltage>16V
     EPWM_selectDigitalCompareTripInput(base1, EPWM_DC_TRIP_TRIPIN8, EPWM_DC_TYPE_DCBL);
     EPWM_setTripZoneDigitalCompareEventCondition(base1, EPWM_TZ_DC_OUTPUT_B2, EPWM_TZ_EVENT_DCXL_HIGH);//DCBEVT2
     EPWM_setDigitalCompareEventSource(base1, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
     EPWM_enableTripZoneSignals(base1, EPWM_TZ_SIGNAL_DCBEVT2);
     EPWM_setTripZoneAction(base1, EPWM_TZ_ACTION_EVENT_DCBEVT2,EPWM_TZ_ACTION_LOW);//DCBEVT2->output voltage >16V will turn off PWM1A/1B

     //---------------
     //| TZEINT[OST] | ->  Enable Trip Zone interrupts
     //---------------
     EPWM_enableTripZoneInterrupt(EPWM1_BASE,
                                  EPWM_TZ_INTERRUPT_OST);

     //---------------
     //| TZCLR[INT,OST] | ->  Enable Trip Zone interrupts
     //---------------
     EPWM_clearTripZoneFlag(EPWM1_BASE,
                            EPWM_TZ_INTERRUPT|
                            EPWM_TZ_FLAG_OST);

      EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_TRIPIN8, EPWM_DC_TYPE_DCBL);
      EPWM_setTripZoneDigitalCompareEventCondition(base2, EPWM_TZ_DC_OUTPUT_B2, EPWM_TZ_EVENT_DCXL_HIGH);//DCBEVT2
      EPWM_setDigitalCompareEventSource(base2, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
      EPWM_enableTripZoneSignals(base2, EPWM_TZ_SIGNAL_DCBEVT2);
      EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_DCBEVT2,EPWM_TZ_ACTION_LOW);//DCBEVT2->output voltage >16V will turn off PWM2A/2B

     //---------------------------
     //| TRIPxMUXENABLE(32 bits) | -> enable the mux in
     //---------------------------
     XBAR_enableEPWMMux(XBAR_TRIP8,XBAR_MUX00);
     XBAR_enableEPWMMux(XBAR_TRIP8,XBAR_MUX08);

     //---------------------
     //| TRIPOUTINV(1 bit) | -> invert the signal via
     //---------------------
     XBAR_invertEPWMSignal(XBAR_TRIP8,false);



        XBAR_enableEPWMMux(XBAR_TRIP7, 0x00);

        //
        // Setup PWM TRIP 7 as the destination for CMPSS3L|CMPSS1L|CMPSS4L Primary OCP OVP and output OCP
        //
        //
//        XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX01_CMPSS1_CTRIPL);//CMPSS1L output over voltage protection
        XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX09_CMPSS5_CTRIPL);//CMPSS5L output over voltage protection
        XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX07_CMPSS4_CTRIPL);//CMPSS4L output  over current protection
        XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX05_CMPSS3_CTRIPL);//CMPSS3L primary over current protection


//        XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX01);
        XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX09);
        XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX07);
        XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX05);

    EPWM_selectDigitalCompareTripInput(base1, EPWM_DC_TRIP_TRIPIN7, EPWM_DC_TYPE_DCBH);//trip7 primary current/output OV OC protection
    EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_TRIPIN7, EPWM_DC_TYPE_DCBH);
    EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_TRIPIN7, EPWM_DC_TYPE_DCBH);

//DCBEVT1->DCH_high->trip7
    EPWM_setTripZoneDigitalCompareEventCondition(base1, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXH_HIGH);//trip7 primary current/output OV OC protection
    EPWM_setTripZoneDigitalCompareEventCondition(base2, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXH_HIGH);
    EPWM_setTripZoneDigitalCompareEventCondition(base3, EPWM_TZ_DC_OUTPUT_B1, EPWM_TZ_EVENT_DCXH_HIGH);


    EPWM_setDigitalCompareEventSource(base1, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);//trip7 primary current/output OV OC protection
    EPWM_setDigitalCompareEventSource(base2, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);
    EPWM_setDigitalCompareEventSource(base3, EPWM_DC_MODULE_B, EPWM_DC_EVENT_1, EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);

    //
    // Enable the following trips. Add Emu stop.

    //

    EPWM_enableTripZoneSignals(base1, EPWM_TZ_SIGNAL_DCBEVT1);//one shot for Trip7 primary current protection
    EPWM_enableTripZoneSignals(base2, EPWM_TZ_SIGNAL_DCBEVT1);
    EPWM_enableTripZoneSignals(base3, EPWM_TZ_SIGNAL_DCBEVT1);

    //
    // What do we want the OST/CBC events to do?
    // TZA events can force EPWMxA
    // TZB events can force EPWMxB
    //
    EPWM_setTripZoneAction(base1, EPWM_TZ_ACTION_EVENT_TZA,EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(base1, EPWM_TZ_ACTION_EVENT_TZB,EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_TZA,EPWM_TZ_ACTION_LOW);//(pwm2,0,2)
    EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_TZB,EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_TZA,EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_TZB,EPWM_TZ_ACTION_LOW);

    EPWM_setTripZoneAction(base1, EPWM_TZ_ACTION_EVENT_DCAEVT2,EPWM_TZ_ACTION_DISABLE);//DCAEVT2->PCMC will do nothing on PWM1A
    EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_DCAEVT2,EPWM_TZ_ACTION_DISABLE);//DCAEVT2->PCMC will do nothing on PWM2A
    EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_DCAEVT2,EPWM_TZ_ACTION_DISABLE);//DCAEVT2->PCMC will do nothing on PWM5A

    // Clear any spurious trip
    EPWM_clearTripZoneFlag(base1,(EPWM_TZ_FLAG_OST|
            EPWM_TZ_FLAG_DCAEVT2|EPWM_TZ_FLAG_DCBEVT1));
    EPWM_clearTripZoneFlag(base2,(EPWM_TZ_FLAG_OST|
            EPWM_TZ_FLAG_DCAEVT2|EPWM_TZ_FLAG_DCBEVT1));
    EPWM_clearTripZoneFlag(base3,(EPWM_TZ_FLAG_OST|
            EPWM_TZ_FLAG_DCAEVT2|EPWM_TZ_FLAG_DCBEVT1));




EDIS;

}

//clear Tz flag
 if (ScheduleTime_100us(BASETIME_TICK_x16) != 0U)        //2ms
        {            
            EALLOW;            
           if(EPwm1Regs.TZCBCFLG.bit.DCBEVT2==1)
           {
               //EPWM_clearTripZoneFlag(EPWM1_BASE,EPWM_TZ_FLAG_CBC|EPWM_TZ_FLAG_DCBEVT2);
             //  EPwm1Regs.TZCLR.bit.CBCPULSE=0;
               EPwm1Regs.TZCLR.bit.DCBEVT2 = 1;
               EPwm1Regs.TZCLR.bit.CBC = 1;
               EPwm1Regs.TZCBCCLR.bit.DCBEVT2 =1;
           }
           if(EPwm2Regs.TZCBCFLG.bit.DCBEVT2==1)
           {
             //  EPwm2Regs.TZCLR.bit.CBCPULSE=0;
               EPwm2Regs.TZCLR.bit.DCBEVT2 = 1;
               EPwm2Regs.TZCLR.bit.CBC = 1;
               EPwm2Regs.TZCBCCLR.bit.DCBEVT2 =1;
           }
           if(EPwm2Regs.TZCBCFLG.bit.DCAEVT2==1)
                      {
                        //  EPwm2Regs.TZCLR.bit.CBCPULSE=0;
                          EPwm2Regs.TZCLR.bit.DCAEVT2 = 1;
                      }
           EDIS;
        }

thanks for your help

the tz flag is cleared in 2ms task. TZ flag can clear when the event recover

when voltage<4V,   CMPss1H is high. it cause trip8, DCBEVT2, and tz, it should shut PWM

but sometimes when when voltage<4V, cmpssSts set, tz set, but PWM still running

Hi Aditya,

thanks for your help.

the tz flag is cleared in 2ms task. TZ flag can be cleared when the event recover.

the configuration is set below, can you help fix the problem?

thanks!

Jane

Jane,

Are you telling that you're able to see the TZ flag cleared, TZ event occurring but the PWM is not shutting down as it should?

Or is it that you are not able to timely clear the TZ flag?

sorry I did not express my problem clearly. 

the first is my problem. that I can see the TZ flag cleared, TZ event occurring(the flag is set) but the PWM is not shutting down as it should.

Hi Jane,

From the first look, the initialization that you've done looks good. Can you try the example available with C2000Ware once on your setup and compare with your example code?

C2000Ware_XX/driverlib/f28004x/examples/epwm/epwm_ex4_digital_compare

Aditya

Jane,

Sorry I missed to highlight one thing. I see you are using the DCBEVT2 for trip purpose with cycle-by-cycle mode. On the contrary, the flags that you've cleared and interrupt that you've enabled corresponds to one-shot mode.

See the snippet from your code below:

     //---------------
     //| TZEINT[OST] | ->  Enable Trip Zone interrupts
     //---------------
     EPWM_enableTripZoneInterrupt(EPWM1_BASE,
                                  EPWM_TZ_INTERRUPT_OST);

     //---------------
     //| TZCLR[INT,OST] | ->  Enable Trip Zone interrupts
     //---------------
     EPWM_clearTripZoneFlag(EPWM1_BASE,
                            EPWM_TZ_INTERRUPT|
                            EPWM_TZ_FLAG_OST);

Also, in later part of the code, you have used one shot configurations. Can you check that part as well?

Thanks,

Aditya