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LAUNCHXL-F28379D: How to connect AMC1305M05 and LAUNCH XL-F28379D and check the offset voltage of ADC

Guru 12500 points
Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: AMC1305M05, C2000WARE, AMC1305M25

Hi,

I am trying to connect the AMC1305M05 and LAUNCH XL-F28379D to check the offset voltage of the ADC.

The circuit diagram is as follows.

In the SDFM sample code in C2000Ware, the code to output the clock from ePWM was not found. Therefore, a 20MHz clock is input to the AMC1305M05 and LAUNCH XL-F28379D from the outside.

The sample code uses "sdfm_pwm_sync_cpu_cpu01" in C2000.

OSR = 256, CLK = 20MHz is set to match the data sheet of AMC1305M05.

Every time I debug, the program stops at the following location.

When I checked the SDIFLG value, 1 was set in the MF1 to MF4 bits. It seems that communication is not correct.

Can you give me some advice?

Also, please tell me if there is an easier way to check the offset voltage of the ADC using AMC1305M05 and LAUNCH XL-F28379D.

Since it is an urgent matter, it would be greatly appreciated if you could answer as soon as possible.

Thanks,

Koki

  • Hi Koki,

    When I checked the SDIFLG value, 1 was set in the MF1 to MF4 bits. It seems that communication is not correct.

    Per F28379D TRM:

    Modulator failures (MFx) are generated when SD-Cx goes missing. The modulator clock is considered missing if SD-Cx does not toggle for 64-SYSCLKs.

    The circuit diagram is as follows.

    Based on your diagram, you are connecting clock to P.18/GPIO18/SD1_D2 and data to P.17/GPIO17/SD1_C1. If the diagram is accurate, then this connection is not correct. I am actually a little puzzled because I don't see a P.17 on the LAUNCHXL-F28379D quick start guide.

    I would suggest P.123/SD1_C1 and P.122/SD1_D1 OR P.124/SD1_D2 and P.125/SD1_C2 for your testing. Note you will need to enable SDFM_PIN_MUX_OPTION3 in the example code if you do use these pins.

    The sample code uses "sdfm_pwm_sync_cpu_cpu01" in C2000.

    In the SDFM sample code in C2000Ware, the code to output the clock from ePWM was not found. Therefore, a 20MHz clock is input to the AMC1305M05 and LAUNCH XL-F28379D from the outside.

    You are correct, the example does not configure the PWM to generate a clock. You can, however, modify one of the existing PWM examples to do this. Generating an external 20MHz clock is acceptable.

    This example will enable all four filters in SDFM1. You should also disable the three other filters if you are not planning on using them.

  • Hi, Gus

    Note you will need to enable SDFM_PIN_MUX_OPTION3 in the example code if you do use these pins.

    Thanks to your clear answer, I was able to receive the data. However, the external clock is not clear and it is uncertain whether the data is correct.

    Therefore, I am thinking of generating a clock with ePWM.

     

    You are correct, the example does not configure the PWM to generate a clock. You can, however, modify one of the existing PWM examples to do this.

    Please let me know if there is a sample code that can be used as a reference for generating 20MHz with ePWM.

    The circuit configuration is considered as follows. It may need a terminating resistor, right?

    This example will enable all four filters in SDFM1. You should also disable the three other filters if you are not planning on using them.

    In "sdfm_ex1_filters", I disabled all but filter 1 and confirmed the operation. Also, since DOSR = 256, the value of SDFM_SHIFT_VALUE was changed to 0x0009. Is this perception correct? Also, please let me know if there are any other codes that need to be changed to measure the offset voltage.

    ■Setting parameter : type = Sinc3 , FOSR = 32 , DOSR = 256

    I also checked the 1024 data stored in filter1Result [loopCounter1]. Please tell me the calculation method to convert this stored 16-bit data to offset voltage.

    Thanks,

    Koki

  • Koki,

    Thanks to your clear answer, I was able to receive the data. However, the external clock is not clear and it is uncertain whether the data is correct.

    Therefore, I am thinking of generating a clock with ePW

    Please let me know if there is a sample code that can be used as a reference for generating 20MHz with ePWM.

    It looks like you are using the bitfield examples (vs. the driverlib examples). I will check with PWM expert to see if there is a good example (I'm not seeing one).

    For driverlib based examples, you can refer to the epwm_ex11_configure_signal example.

    C:\ti\c2000\C2000Ware_4_00_00_00\driverlib\f2837xd\examples\cpu1\epwm

    The circuit configuration is considered as follows. It may need a terminating resistor, right?

    You can add termination resistors if you choose. During testing these can be replaced with 0-ohm resistors if not needed.

    In "sdfm_ex1_filters", I disabled all but filter 1 and confirmed the operation. Also, since DOSR = 256, the value of SDFM_SHIFT_VALUE was changed to 0x0009. Is this perception correct?

    Yes, this is correct.

    I also checked the 1024 data stored in filter1Result [loopCounter1]. Please tell me the calculation method to convert this stored 16-bit data to offset voltage.

    Please see answer to this post:

    https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/694143/ccs-tms320f28377d-i-need-help-with-sdfm#pi320995=3

  • Regarding the PWM example, you can use any of the PWM examples in C2000ware. You only need to configure the time base and action qualifier submodules; the rest of the code can be removed. Note that the PWM will not be able to generate a 50% duty cycle 20MHz clock, but the AMC1305 can accept a clock with 40-60% duty cycle, so this should not cause problems.

  • Hi, Gus

    Thank you for your reply!

    I checked the thread of this E2E. The answer from this E2E was listed ⓪.

    Vin = Vclipping * {(2 * Output_of_DF) / ((2 * Max_digitalfilter_value (FilterType, OSR)) - 1)} ・ ・ ・ ⓪

    I want to utilize this formula ⓪.


    Filter Type = Sinc3 ・ ・ ・ ①
    DOSR = 256 ・ ・ ・ ②
    Vclipping = 312.5mv ・ ・ ・ ③

    From ①,②
     Max_digitalfilter_value (FilterType, DOSR) = Max_datafilter_value (Sinc3, 256) = 16,777,216 ・ ・ ・ ④

    Substitute ③,④ for ⓪
    Vin = 312.5mv  * {(2 * Output_of_DF) / ((2 * 16,777,216)  - 1)}
    = 312.5mv * (2 * Output_of_DF / 33554431)
    = 0.00001863 x Output_of_DF (mV) ・ ・ ・ ⑤

    So if I get filter1Result [loopCounter1] = 10000 (DEX), then Vin = 0.1863 (mV) = 186.3 (uV).
    Is this calculation method correct? If it is correct, I think this value is the offset voltage of AMC1305M25.

    Thanks,

    Koki

  • Koki,

    A couple of notes. First the AMC1305M05 has a Vclipping spec of +/-62.5mV. I believe you are looking at the table for the AMC1305x25 device which is in the same datasheet. You mentioned you were using the AMC1305M05.

    Second, your understanding of the formulas is correct assuming "DEX" here means decimal value AND 32-bit data representation is used at the output of the data filter. If you use 16-bit data representation, then the shift configuration comes into play and you have to take that into account. For example, if 9-bit shift is used, then the Max_datafilter_value has to be adjusted to take the shift value into account. For example, for a shift value of 9, the max data filter value is 32,768.

    I hope this helps!

    EDIT: Corrected information regarding impact of shift value. 

  • Hi, Gus

    A couple of notes. First the AMC1305M05 has a Vclipping spec of +/-62.5mV. I believe you are looking at the table for the AMC1305x25 device which is in the same datasheet. You mentioned you were using the AMC1305M05.

    I'm sorry. I made a mistake in the title.

    I am using AMC1305M25 instead of AMC1305M05 for evaluation. So I use Vclipping = 312.5mv for the calculation.

    If you use 16-bit data representation, then the shift configuration comes into play and you have to take that into account. For example, if 9-bit shift is used, then the Max_datafilter_value has to be adjusted to take the shift value into account. For example, for a shift value of 9, the max data filter value is 32,768.

    The "9-bit shift" you're talking about is a yellow marker, right? Currently, on the program, type = Sinc3, DOSR = 256, so 9-bit shift is selected.

    Based on what you have taught, I will describe how to calculate the voltage with AMC1305M25 and C2000, so please check it just in case.

    Filter Type = Sinc3 ・ ・ ・ ①
    DOSR = 256 ・ ・ ・ ②
    Vclipping = 312.5mv ・ ・ ・ ③

    From ①, ②
    Max_digitalfilter_value (FilterType, DOSR) = Max_datafilter_value (Sinc3, 256) = 32768 ・ ・ ・ ④

    Substitute ③, ④ for ⓪
    Vin = 312.5mv * {(2 * Output_of_DF) / ((2 * 32768) - 1)}
        = 312.5mv * (2 * Output_of_DF / 65535)
        = 0.00953689  Output_of_DF (mV) ・ ・ ・ ⑤

    I think that up to ⑤ is probably correct.
    Is the value assigned to Output_of_DF the result of a filter stored in the buffer in the program?

    for example
    Output_of_DF = filter1Result [loopCounter1] = 1965 etc.

    If so, the offset voltage will be considerably large (about 18.7mV). If the recognition of Output_of_DF is different, please let me know.

    //###########################################################################
    //
    // FILE:   sdfm_ex1_filters.c
    //
    // TITLE:  SDFM Filter sync CPU Example.
    //
    //! \addtogroup driver_example_list
    //! <h1> SDFM Filter Sync CPU</h1>
    //!
    //! In this example, SDFM filter data is read by CPU in SDFM ISR routine. The
    //! SDFM configuration is shown below:
    //!  -  SDFM used in this example - SDFM1
    //!  -  Input control mode selected - MODE0
    //!  -  Comparator settings
    //!       - Sinc3 filter selected
    //!       - OSR = 32
    //!       - HLT = 0x7FFF (Higher threshold setting)
    //!       - LLT  = 0x0000(Lower threshold setting)
    //!  -  Data filter settings
    //!      - All the 4 filter modules enabled
    //!      - Sinc3 filter selected
    //!      - OSR = 128
    //!      - All the 4 filters are synchronized by using MFE
    //!       (Master Filter enable bit)
    //!      - Filter output represented in 16 bit format
    //!      - In order to convert 25 bit Data filter
    //!        into 16 bit format user needs to right shift by 8 bits for
    //!        Sinc3 filter with OSR = 128
    //!  - Interrupt module settings for SDFM filter
    //!      - All the 4 higher threshold comparator interrupts disabled
    //!      - All the 4 lower threshold comparator interrupts disabled
    //!      - All the 4 modulator failure interrupts disabled
    //!      - All the 4 filter will generate interrupt when a new filter data
    //!        is available.
    //!
    //
    //###########################################################################
    //
    // $Release Date:  $
    // $Copyright:
    // Copyright (C) 2013-2021 Texas Instruments Incorporated - http://www.ti.com/
    //
    // Redistribution and use in source and binary forms, with or without 
    // modification, are permitted provided that the following conditions 
    // are met:
    // 
    //   Redistributions of source code must retain the above copyright 
    //   notice, this list of conditions and the following disclaimer.
    // 
    //   Redistributions in binary form must reproduce the above copyright
    //   notice, this list of conditions and the following disclaimer in the 
    //   documentation and/or other materials provided with the   
    //   distribution.
    // 
    //   Neither the name of Texas Instruments Incorporated nor the names of
    //   its contributors may be used to endorse or promote products derived
    //   from this software without specific prior written permission.
    // 
    // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
    // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
    // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
    // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
    // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
    // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
    // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
    // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    // $
    //###########################################################################
    
    //
    // Included Files
    //
    #include "driverlib.h"
    #include "device.h"
    #include <stdio.h>
    
    //
    // Defines
    //
    #define MAX_SAMPLES               1024
    #define SDFM_PIN_MUX_OPTION1      1
    #define SDFM_PIN_MUX_OPTION2      2
    #define SDFM_PIN_MUX_OPTION3      3
    
    //
    // Globals
    //
    uint16_t peripheralNumber;
    int16_t  filter1Result[MAX_SAMPLES];
    
    #pragma DATA_SECTION(filter1Result, "Filter1_RegsFile");
    
    //
    // Defines
    //
    #define SDFM_FILTER_ENABLE 0x2U
    
    //
    // Function Prototypes
    //
    void configureSDFMPins(uint16_t);
    void done(void);
    __interrupt void sdfm1ISR(void);
    void setPinConfig1(void);
    void setPinConfig2(void);
    void setPinConfig3(void);
    
    //
    // Main
    //
    void main(void)
    {
        uint16_t  pinMuxOption;
        uint16_t  hlt, llt;
    
        //
        // Initialize device clock and peripherals
        //
        Device_init();
    
        //
        // Setup GPIO by disabling pin locks and enabling pullups
        //
        Device_initGPIO();
    
        //
        // Initialize PIE and clear PIE registers. Disables CPU interrupts.
        //
        Interrupt_initModule();
    
        //
        // Initialize the PIE vector table with pointers to the shell Interrupt
        // Service Routines (ISR).
        //
        Interrupt_initVectorTable();
    
        //
        // Interrupts that are used in this example are re-mapped to
        // ISR functions found within this file.
        //
        Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP5);
        Interrupt_register(INT_SD1, sdfm1ISR);
        //
        // Enable SDFM1 amd SDFM2 interrupts
        //
        Interrupt_enable(INT_SD1);
    
    #ifdef CPU1
        pinMuxOption = SDFM_PIN_MUX_OPTION3;
    
        //
        // Configure GPIO pins as SDFM pins
        //
        configureSDFMPins(pinMuxOption);
    #endif
    
        //
        // Input Control Unit
        //
        // Configure Input Control Unit: Modulator Clock rate = Modulator data rate
        //
        SDFM_setupModulatorClock(SDFM1_BASE, SDFM_FILTER_1,
                                 SDFM_MODULATOR_CLK_EQUAL_DATA_RATE);
    
        //
        // Comparator Unit - over and under value threshold settings
        //
        hlt = 0x7FFF;
        llt = 0x0000;
    
        //
        // Configure Comparator Unit's comparator filter type and comparator's
        // OSR value, higher threshold, lower threshold
        //
        SDFM_configComparator(SDFM1_BASE,
            (SDFM_FILTER_1 | SDFM_FILTER_SINC_3 | SDFM_SET_OSR(32)),
            (SDFM_GET_LOW_THRESHOLD(llt) | SDFM_GET_HIGH_THRESHOLD(hlt)));
    
    
        //
        // Data Filter Unit
        //
        // Configure Data Filter Unit - filter type, OSR value and
        // enable / disable data filter
        //
        SDFM_configDataFilter(SDFM1_BASE, (SDFM_FILTER_1 | SDFM_FILTER_SINC_3 |
               SDFM_SET_OSR(256)), (SDFM_DATA_FORMAT_16_BIT | SDFM_FILTER_ENABLE |
               SDFM_SHIFT_VALUE(0x0009)));
    
    
        //
        // Enable Master filter bit: Unless this bit is set none of the filter modules
        // can be enabled. All the filter modules are synchronized when master filter
        // bit is enabled after individual filter modules are enabled.
        //
        SDFM_enableMasterFilter(SDFM1_BASE);
    
        //
        // PWM11.CMPC, PWM11.CMPD, PWM12.CMPC and PWM12.CMPD signals cannot synchronize
        // the filters. This option is not being used in this example.
        //
        SDFM_disableExternalReset(SDFM1_BASE, SDFM_FILTER_1);
    
        //
        // Enable interrupts
        //
        // Following SDFM interrupts can be enabled / disabled using this function.
        // Enable / disable comparator high threshold
        // Enable / disable comparator low threshold
        // Enable / disable modulator clock failure
        // Enable / disable data filter acknowledge
        //
        SDFM_enableInterrupt(SDFM1_BASE, SDFM_FILTER_1,
                (SDFM_MODULATOR_FAILURE_INTERRUPT |
                 SDFM_DATA_FILTER_ACKNOWLEDGE_INTERRUPT));
    
        SDFM_disableInterrupt(SDFM1_BASE, SDFM_FILTER_1,
                (SDFM_HIGH_LEVEL_THRESHOLD_INTERRUPT |
                 SDFM_LOW_LEVEL_THRESHOLD_INTERRUPT));
    
        //
        // Enable master interrupt so that any of the filter interrupts can trigger
        // by SDFM interrupt to CPU
        //
        SDFM_enableMasterInterrupt(SDFM1_BASE);
    
        //
        // Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
        //
        EINT;
        ERTM;
    
        //
        // Wait for an interrupt
        //
        while(1);
    }
    
    //
    // sdfm1ISR - SDFM 1 ISR
    //
    __interrupt void sdfm1ISR(void)
    {
        volatile uint32_t sdfmReadFlagRegister = 0;
        static uint16_t loopCounter1 = 0;
    
        SDFM_setOutputDataFormat(SDFM1_BASE, SDFM_FILTER_1,
                                 SDFM_DATA_FORMAT_16_BIT);
    
    
        //
        // Read SDFM flag register (SDIFLG)
        //
        sdfmReadFlagRegister = HWREG(SDFM1_BASE + SDFM_O_SDIFLG);
    
        if(loopCounter1 < MAX_SAMPLES)
        {
            //
            // Read each SDFM filter output and store it in respective filter
            // result array
            //
            filter1Result[loopCounter1] =
                  (int16_t)(SDFM_getFilterData(SDFM1_BASE, SDFM_FILTER_1) >> 16U);
    
            loopCounter1++;
    
            //
            // Clear SDFM flag register (SDIFLG)
            //
            SDFM_clearInterruptFlag(SDFM1_BASE, SDFM_MASTER_INTERRUPT_FLAG |
                                                0xFFFF);
    
            //
            // Read SDFM flag register (SDIFLG)
            //
            sdfmReadFlagRegister = HWREG(SDFM1_BASE + SDFM_O_SDIFLG);
    
            //
            // If any flags have been set, stop
            //
            if(sdfmReadFlagRegister != 0x0)
            {
                ESTOP0;
            }
        }
        else
        {
            ESTOP0;
            done();
        }
    
        //
        // Acknowledge this __interrupt to receive more __interrupts from group 5
        //
        Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP5);
    }
    
    //
    // configureSDFMPins - Configure SDFM GPIOs
    //
    void configureSDFMPins(uint16_t sdfmPinOption)
    {
        uint16_t pin;
    
        switch (sdfmPinOption)
        {
            case SDFM_PIN_MUX_OPTION1:
                for(pin = 16; pin <= 31; pin++)
                {
                    GPIO_setDirectionMode(pin, GPIO_DIR_MODE_IN);
                    GPIO_setMasterCore(pin, GPIO_CORE_CPU1);
                    GPIO_setPadConfig(pin, GPIO_PIN_TYPE_STD);
                    GPIO_setQualificationMode(pin, GPIO_QUAL_ASYNC);
                }
                setPinConfig1();
                break;
    
            case SDFM_PIN_MUX_OPTION2:
                for(pin = 48; pin <= 63; pin++)
                {
                    GPIO_setDirectionMode(pin, GPIO_DIR_MODE_IN);
                    GPIO_setMasterCore(pin, GPIO_CORE_CPU1);
                    GPIO_setPadConfig(pin, GPIO_PIN_TYPE_STD);
                    GPIO_setQualificationMode(pin, GPIO_QUAL_ASYNC);
                }
                setPinConfig2();
                break;
    
            case SDFM_PIN_MUX_OPTION3:
                for(pin = 122; pin <= 137; pin++)
                {
                    GPIO_setMasterCore(pin, GPIO_CORE_CPU1);
                    GPIO_setDirectionMode(pin, GPIO_DIR_MODE_IN);
                    GPIO_setPadConfig(pin, GPIO_PIN_TYPE_STD);
                    GPIO_setQualificationMode(pin, GPIO_QUAL_ASYNC);
                }
                setPinConfig3();
                break;
        }
    }
    
    //
    // done - Function to halt debugger and stop application
    //
    void done(void)
    {
        asm(" ESTOP0");
        for(;;);
    }
    
    //
    // setPinConfig1 - sets the pin configuration for pins 16-21
    //
    void setPinConfig1()
    {
        GPIO_setPinConfig(GPIO_16_SD1_D1);
        GPIO_setPinConfig(GPIO_17_SD1_C1);
        GPIO_setPinConfig(GPIO_18_SD1_D2);
        GPIO_setPinConfig(GPIO_19_SD1_C2);
        GPIO_setPinConfig(GPIO_20_SD1_D3);
        GPIO_setPinConfig(GPIO_21_SD1_C3);
        GPIO_setPinConfig(GPIO_22_SD1_D4);
        GPIO_setPinConfig(GPIO_23_SD1_C4);
        GPIO_setPinConfig(GPIO_24_SD2_D1);
        GPIO_setPinConfig(GPIO_25_SD2_C1);
        GPIO_setPinConfig(GPIO_26_SD2_D2);
        GPIO_setPinConfig(GPIO_27_SD2_C2);
        GPIO_setPinConfig(GPIO_28_SD2_D3);
        GPIO_setPinConfig(GPIO_29_SD2_C3);
        GPIO_setPinConfig(GPIO_30_SD2_D4);
        GPIO_setPinConfig(GPIO_31_SD2_C4);
    }
    
    //
    // setPinConfig2 - sets the pin configuration for pins 48-63
    //
    void setPinConfig2()
    {
        GPIO_setPinConfig(GPIO_48_SD1_D1);
        GPIO_setPinConfig(GPIO_49_SD1_C1);
        GPIO_setPinConfig(GPIO_50_SD1_D2);
        GPIO_setPinConfig(GPIO_51_SD1_C2);
        GPIO_setPinConfig(GPIO_52_SD1_D3);
        GPIO_setPinConfig(GPIO_53_SD1_C3);
        GPIO_setPinConfig(GPIO_54_SD1_D4);
        GPIO_setPinConfig(GPIO_55_SD1_C4);
        GPIO_setPinConfig(GPIO_56_SD2_D1);
        GPIO_setPinConfig(GPIO_57_SD2_C1);
        GPIO_setPinConfig(GPIO_58_SD2_D2);
        GPIO_setPinConfig(GPIO_59_SD2_C2);
        GPIO_setPinConfig(GPIO_60_SD2_D3);
        GPIO_setPinConfig(GPIO_61_SD2_C3);
        GPIO_setPinConfig(GPIO_62_SD2_D4);
        GPIO_setPinConfig(GPIO_63_SD2_C4);
    }
    
    //
    // setPinConfig3 - sets the pin configuration for pins 122-137
    //
    void setPinConfig3()
    {
        GPIO_setPinConfig(GPIO_122_SD1_D1);
        GPIO_setPinConfig(GPIO_123_SD1_C1);
        GPIO_setPinConfig(GPIO_124_SD1_D2);
        GPIO_setPinConfig(GPIO_125_SD1_C2);
        GPIO_setPinConfig(GPIO_126_SD1_D3);
        GPIO_setPinConfig(GPIO_127_SD1_C3);
        GPIO_setPinConfig(GPIO_128_SD1_D4);
        GPIO_setPinConfig(GPIO_129_SD1_C4);
        GPIO_setPinConfig(GPIO_130_SD2_D1);
        GPIO_setPinConfig(GPIO_131_SD2_C1);
        GPIO_setPinConfig(GPIO_132_SD2_D2);
        GPIO_setPinConfig(GPIO_133_SD2_C2);
        GPIO_setPinConfig(GPIO_134_SD2_D3);
        GPIO_setPinConfig(GPIO_135_SD2_C3);
        GPIO_setPinConfig(GPIO_136_SD2_D4);
        GPIO_setPinConfig(GPIO_137_SD2_C4);
    }
    
    //
    // End of file
    //
    

    Thanks,

    Koki

  • Is the value assigned to Output_of_DF the result of a filter stored in the buffer in the program?

    For the settings you have given, the digital filter will output a value between -32768 and 32768. Your program would have to apply formula #5 to obtain the corresponding Vin value.

    for example
    Output_of_DF = filter1Result [loopCounter1] = 1965 etc.

    If so, the offset voltage will be considerably large (about 18.7mV)

    Yes, in this case a digital code of 1965 is equivalent to 18.7mV.