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TMS320F28377D-EP: CLLLC

Part Number: TMS320F28377D-EP
Other Parts Discussed in Thread: TIDA-01604, TIDM-02002

Dear TI:

         PWM1 and PWM2 drive totem pole PFC with 65kHz (TIDA-01604 reference design )

         PWM3 PWM4 PWM5 PWM6 drive CLLLC with 165k~240k (TIDM-02002 reference design)

        According to《TMS320F2837xD Dual-Core Microcontrollers Technical Reference Manual》Figure 15-7. Time-Base Counter Synchronization Scheme , how can I make sure PWM3 PWM4 PWM5 PWM6 time base are synced with PWM1 ,since PWM3 PWM4 PWM5 PWM6 frequency are varying

  • Huang, 

    if you start the PWM clocks with TBCLKSYNC then all PWMs will be synchronized. For designs like TIDM-02002 from that point you can assume that PWMs are synchronized.

    If you wish to add periodic synchronization this can be done through PWM2. However when using high-resolution PMWs please note that the sync chain can add jitter since it is not High-Resolution, which is why this is typically avoided when possible. And rely on starting the PWMs at the same time.

    Finally, do you need your PFC and CLLLC PWMs to be synchronized?

    Regards,
    Cody 

  • Cody,

           I tried to disabled PWM3 and PWM4 synchronize to PWM1, phase shift between PWM3 and PWM4 occured.

          How could i make sure PWM3 and PWM4 synchronized?

          My CLLLC operation without  High-Resolution since frequency just  165k~240k.

  • Huang, 

    PWM3 and PWM4 always have the same period, correct? They should never phase shift as long as their frequency is varied at the same time and at the same rate. there is a chance to shift if you are writing the period registers near the end of the PWM period... It is possible for one PWM period to be updated and the second PWM's period to update the next cycle.

    Regards,
    Cody 

  • Cody,

            yes,i made some mistake.i dealed with that of syncing pwm3 and pwm4 at software start and disabled phase shift then.

     thanks for your reply!