TMS320F280040-Q1: ePWM Channels A and B shifted (B is Lagged in respect A)

Luciano Chaves

Hello folks,

I'm facing a problem with ePWM regarding the synchronization of channels. Channel B is always lagged in respect to channel A about 32ns. I didn't find any note on the Technical Reference Manual about this lag between channels (SPRUI33D v.2020).

Here there is my setup:

EPWM_setPhaseShift (_pwmBaseAdd, 0U);
EPWM_setTimeBaseCounter (_pwmBaseAdd, 0U);
EPWM_setTimeBaseCounterMode (_pwmBaseAdd, EPWM_COUNTER_MODE_UP);

EPWM_setClockPrescaler(_pwmBaseAdd, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_8);

/* Channel A*/
EPWM_setActionQualifierAction(_pwmBaseAdd,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_HIGH,
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(_pwmBaseAdd,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_LOW,
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);

/*Channel B*/
EPWM_setActionQualifierAction(_pwmBaseAdd,
EPWM_AQ_OUTPUT_B,
EPWM_AQ_OUTPUT_HIGH,
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);

EPWM_setActionQualifierAction(_pwmBaseAdd,
EPWM_AQ_OUTPUT_B,
EPWM_AQ_OUTPUT_LOW,
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);

/*Same CMP value for both channels */

EPWM_setCounterCompareValue(_pwmBaseAdd, EPWM_COUNTER_COMPARE_A, CMPA_aux);
EPWM_setCounterCompareValue(_pwmBaseAdd, EPWM_COUNTER_COMPARE_B, CMPA_aux);

EPWM_setTimeBasePeriod (_pwmBaseAdd, localTBPRD);

Is this a hardware delay?

Any help will be much appreciated.

over 2 years ago

0 Nima Eskandari over 2 years ago

TI__Guru 51940 points

No, it should produce identical settings based on what you have. You are setting both CMPA and CMPB to CMPA_aux?

0 Luciano Chaves over 2 years ago in reply to Nima Eskandari

Prodigy 70 points

Hi Nima, yes! I'm writing the same value to CMPA and CMPB. I tried the complementary mode, setting DBCTL[POLSEL] = 10 (2 dec), and the result was the same, 32ns shift between channel A and B on epwm3.

0 Nima Eskandari over 2 years ago in reply to Luciano Chaves

TI__Guru 51940 points

The code you have the question does not have any deadband configuration. In the setting above it should be identical. Do you have any other settings that is not included in the post?

0 Luciano Chaves over 2 years ago in reply to Nima Eskandari

Prodigy 70 points

Hi Nima, I triple-check the code before placing this question. This is my setup, and it's based on driverlib examples. Do you suggest checking any particular register? Is there any configuration able to lag the channels of a PWM module? By the way, using the dead-time feature I was able to compensate for this time shift, however, it is not an asymmetric solution on rising and falling edges.

0 Nima Eskandari over 2 years ago in reply to Luciano Chaves

TI__Guru 51940 points

For your settings that you have posted, the CMPA/CMPB set to the same value, and the actions AQ being identical, the signal MUST BE IDENTICAL. There is something else going on in your system...

0 Nima Eskandari over 2 years ago in reply to Nima Eskandari

TI__Guru 51940 points

Remove all deadband code and all other code that isnt relevant, then test the code, and forward me the whole project. I want to test this.

0 Luciano Chaves over 2 years ago in reply to Nima Eskandari

Prodigy 70 points

Hi Nima, I will do it. Please give me one day or so to these tests and get back the results to you. Might I attach the project to this post? Thanks

0 Nima Eskandari over 2 years ago in reply to Luciano Chaves

TI__Guru 51940 points

No problem! I will await the test project.

0 Luciano Chaves over 2 years ago in reply to Nima Eskandari

Prodigy 70 points

Hello Nima, after your inputs I've decided to check my oscilloscope and boom! There is a 32ns delay between channels A and B. I believe this solves the problem. Thank you for your inputs and your time.

Best Regards,

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TMS320F280040-Q1: ePWM Channels A and B shifted (B is Lagged in respect A)