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TMS320F28379D: TMS320F28379D: SysCtl_setClock()

Part Number: TMS320F28379D
Other Parts Discussed in Thread: LAUNCHXL-F280025C, C2000WARE

Hi ,

I am trying to use set up the F28379D clock using the SysCtl_setClock() function. I have referenced one of the examples for LaunchXL-f280025C which also uses the same function SysCtl_setClock(). 

From hal.c

#if defined(BSXL8323RS_REVA) || defined(BSXL8323RH_REVB) || \
defined(BSXL8353RS_REVA) || defined(BSXL3PHGAN_REVA) || \
defined(BSXL8316RT_REVA)
// External 20M Crystal on LaunchXL
// Set up PLL control and clock dividers
// CPU Clock Frequency = 100MHz
// PLLSYSCLK = 20MHz (XTAL_OSC) * 30 (IMULT) / (2 (REFDIV) * 3 (ODIV) * 1(SYSDIV))
SysCtl_setClock(SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(30) |
SYSCTL_REFDIV(2) | SYSCTL_ODIV(3) |
SYSCTL_SYSDIV(1) | SYSCTL_PLL_ENABLE |
SYSCTL_DCC_BASE_0);

Here are the parameter values for f280025C on the Launch XL from sysctl.h

// DCC module selection for checking PLL clock validity
//
// Mask and shift for DCC module base address in config
//
#define SYSCTL_DCC_BASE_M (uint32_t)0x30000000U

#define SYSCTL_DCC_BASE_S 28U

#define SYSCTL_DCC_BASE_0 0x00000000U //!< DCC0 module
#define SYSCTL_DCC_BASE_1 0x10000000U //!< DCC1 module
#define SYSCTL_DCC_BASE_2 0x20000000U //!< DCC2 module

If I use the same function for SysCtl_setClock(), I am getting followings error and warnings.

The question is what are the SYSCTL_DCC_BASE_0 values for F28379D when used with the control card.

Here are my set up details:

  • F28379D controlCARD
  • C2000Ware_4_01_00_00
  • C2000Ware_MotorControl_SDK_4_00_00_00

  • Jagbir,

    The F2837xD device does not have the DCC module, which is why you are getting the error from CCS, and you will be un-able to use this method for clock verification.

    You can use the following app note to determine the IP on each device https://www.ti.com/lit/spru566

    I would recommend re-using the clock setup from the F2837x Driver LIB here: C:\ti\c2000\C2000Ware_4_01_00_00\device_support\f2837xd.  This has a similar function to compare the PLL output frequency, but using the CPUTimers vs the DCC.  Given the lack of dedicated HW, there is more CPU overhead with this method.

    Best,

    Matthew