Dear team:
My customer uses the on-chip ADC1 and ADC2 for sampling testing with the following settings:
Use the routine in controlSUITE and modified as:
The input port of ADC1 is ADC1INB0
The input port of ADC2 is ADC2INB1
The test found that the values sampled by ADC1 and ADC2 are both smaller than the theoretical values, but the value of ADC2 is smaller in magnitude.
What could be causing the problem?
Best regards,
Green
Green,
Since the error we observe is scaling with input voltage this is gain error contribution shown below. Notice that the spec over temperature is +/-60LSB at full scale and customer is observing much lower than that on both ADCs(-15LSB and -7LSB respectively). There is likely some offset component here as well...
If I use a 2pt formula for each ADC I get the following:
ADC1 Gain error is 0.995% or -20LSB Offset error = 3LSB
ADC2 Gain error is 0.996% or -16LSB Offset error = -1LSB
So, I would say that these readings are within spec of the DS, and this variation is normal.
In terms of the difference between ADCs there is also spec of ch/ch variation both for Gain and offset of +/-4LSBs, which is also met.
We have ability for customer to self calibrate out the offset using an internal connection to VREFLO. Since this is the same for both ADCs customer can use this to reduce the ADC vs ADC offset, in addition to local offset.
For gain error either local or between ADCs, if customer can have common reference for both ADCs they could mathematically remove the gain error, or a least the delta between the ADCs post result.
Best,
Matthew
