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TMS320F28386S: Cla1funcsLoadStart, Cla1funcsLoadEnd, etc definition

Part Number: TMS320F28386S
Other Parts Discussed in Thread: C2000WARE

Hi, I am trying to make my project run from Flash and I have some problems.

I am compeering my work with the examples provided with C2000Ware installation.

I dont understand where is the definitoin of the fallowing:

Cla1funcsLoadStart, Cla1funcsLoadEnd

Cla1funcsRunStart, Cla1funcsLoadSize

On a demo project, when debugging the project, Cla1funcsLoadSize gets a value of : 0x000000B8

When deugging my project, Cla1funcsLoadSize gets a value of : 0xFFFFFFFF

Also Cla1funcsLoadStart = 0xFFFFFFFF and Cla1funcsLoadEnd = 0xFFFFFFFF

So where dose this value comes from?

Attached is my linker command files for RAM and FLASH

  • Un able up upload files :-(

  • Hi Nir Givon,

    What error did you get when you tried to upload the files?

    Thanks and regards,

    Vamsi

  • CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start

    MEMORY
    {
    /* BEGIN is used for the "boot to Flash" bootloader mode */
    BEGIN : origin = 0x080000, length = 0x000002
    BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
    RAMM0 : origin = 0x0001B1, length = 0x00024F
    RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
    // RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    RAMD0 : origin = 0x00C000, length = 0x000800
    RAMD1 : origin = 0x00C800, length = 0x000800
    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS6 : origin = 0x00B000, length = 0x000800
    RAMLS7 : origin = 0x00B800, length = 0x000800
    RAMGS0 : origin = 0x00D000, length = 0x001000
    RAMGS1 : origin = 0x00E000, length = 0x001000
    RAMGS2 : origin = 0x00F000, length = 0x001000
    RAMGS3 : origin = 0x010000, length = 0x001000
    RAMGS4 : origin = 0x011000, length = 0x001000
    RAMGS5 : origin = 0x012000, length = 0x001000
    RAMGS6 : origin = 0x013000, length = 0x001000
    RAMGS7 : origin = 0x014000, length = 0x001000
    RAMGS8 : origin = 0x015000, length = 0x001000
    RAMGS9 : origin = 0x016000, length = 0x001000
    RAMGS10 : origin = 0x017000, length = 0x001000
    RAMGS11 : origin = 0x018000, length = 0x001000
    RAMGS12 : origin = 0x019000, length = 0x001000
    RAMGS13 : origin = 0x01A000, length = 0x001000
    RAMGS14 : origin = 0x01B000, length = 0x001000
    RAMGS15 : origin = 0x01C000, length = 0x000FF8
    // RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

    /* Flash sectors */
    FLASH0 : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
    FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
    FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
    FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
    FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
    FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
    FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
    FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
    FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
    FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
    FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
    FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
    FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
    FLASH13 : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
    // FLASH13_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

    CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
    CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
    CPUTOCMRAM : origin = 0x039000, length = 0x000800
    CMTOCPURAM : origin = 0x038000, length = 0x000800

    CANA_MSG_RAM : origin = 0x049000, length = 0x000800
    CANB_MSG_RAM : origin = 0x04B000, length = 0x000800

    RESET : origin = 0x3FFFC0, length = 0x000002

    CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
    }

    SECTIONS
    {
    codestart : > BEGIN, ALIGN(8)
    .text : >> FLASH1 | FLASH2 | FLASH3 | FLASH4, ALIGN(8)
    .cinit : > FLASH4, ALIGN(8)
    .switch : > FLASH1, ALIGN(8)
    .reset : > RESET, TYPE = DSECT /* not used, */
    .stack : > RAMM1

    #if defined(__TI_EABI__)
    .init_array : > FLASH1, ALIGN(8)
    .bss : > RAMLS3
    .bss:output : > RAMLS3
    .data : > RAMLS4
    .sysmem : > RAMLS4
    /* Initalized sections go in Flash */
    .const : > FLASH5, ALIGN(8)
    #else
    .pinit : > FLASH1, ALIGN(8)
    .ebss : > RAMLS3
    .esysmem : > RAMLS4
    /* Initalized sections go in Flash */
    .econst : >> FLASH4 | FLASH5, ALIGN(8)
    #endif

    MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
    MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT
    MSGRAM_CPU_TO_CM : > CPUTOCMRAM, type=NOINIT
    MSGRAM_CM_TO_CPU : > CMTOCPURAM, type=NOINIT

    dclfuncs : > FLASH1, ALIGN(8)


    /* CLA specific sections */
    #if defined(__TI_EABI__)
    Cla1Prog : LOAD = FLASH12,
    RUN >> RAMLS4 | RAMLS5 | RAMLS6 | RAMLS7
    LOAD_START(Cla1funcsLoadStart),
    LOAD_END(Cla1funcsLoadEnd),
    RUN_START(Cla1funcsRunStart),
    LOAD_SIZE(Cla1funcsLoadSize),
    ALIGN(8)
    #else
    Cla1Prog : LOAD = FLASH4,
    RUN = RAMLS5,
    LOAD_START(_Cla1funcsLoadStart),
    LOAD_END(_Cla1funcsLoadEnd),
    RUN_START(_Cla1funcsRunStart),
    LOAD_SIZE(_Cla1funcsLoadSize),
    ALIGN(8)
    #endif

    CLADataLS0 : > RAMLS0
    CLADataLS1 : > RAMLS1

    Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, type=NOINIT
    CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, type=NOINIT
    Cla1DataRam : >> RAMLS0 | RAMLS1

    /* CLA C compiler sections */
    //
    // Must be allocated to memory the CLA has write access to
    //
    CLAscratch :
    { *.obj(CLAscratch)
    . += CLA_SCRATCHPAD_SIZE;
    *.obj(CLAscratch_end) } > RAMLS1

    .scratchpad : > RAMLS1
    .bss_cla : > RAMLS1
    cla_shared : > RAMLS1
    #if defined(__TI_EABI__)
    .const_cla : LOAD = FLASH2,
    RUN = RAMLS1,
    RUN_START(Cla1ConstRunStart),
    LOAD_START(Cla1ConstLoadStart),
    LOAD_SIZE(Cla1ConstLoadSize)
    #else
    .const_cla : LOAD = FLASH2,
    RUN = RAMLS1,
    RUN_START(_Cla1ConstRunStart),
    LOAD_START(_Cla1ConstLoadStart),
    LOAD_SIZE(_Cla1ConstLoadSize)
    #endif


    #if defined(__TI_EABI__)
    .TI.ramfunc : {} LOAD = FLASH3,
    RUN = RAMD0,
    LOAD_START(RamfuncsLoadStart),
    LOAD_SIZE(RamfuncsLoadSize),
    LOAD_END(RamfuncsLoadEnd),
    RUN_START(RamfuncsRunStart),
    RUN_SIZE(RamfuncsRunSize),
    RUN_END(RamfuncsRunEnd),
    ALIGN(8)
    #else
    .TI.ramfunc : {} LOAD = FLASH3,
    RUN = RAMD0,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    ALIGN(8)
    #endif

    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

  • CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start

    MEMORY
    {
    /* BEGIN is used for the "boot to SARAM" bootloader mode */
    BEGIN : origin = 0x000000, length = 0x000002
    BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
    RAMM0 : origin = 0x0001B1, length = 0x00024F
    RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
    // RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    RAMD0 : origin = 0x00C000, length = 0x000800
    RAMD1 : origin = 0x00C800, length = 0x000800
    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS6 : origin = 0x00B000, length = 0x000800
    RAMLS7 : origin = 0x00B800, length = 0x000800
    RAMGS0 : origin = 0x00D000, length = 0x001000
    RAMGS1 : origin = 0x00E000, length = 0x001000
    RAMGS2 : origin = 0x00F000, length = 0x001000
    RAMGS3 : origin = 0x010000, length = 0x001000
    RAMGS4 : origin = 0x011000, length = 0x001000
    RAMGS5 : origin = 0x012000, length = 0x001000
    RAMGS6 : origin = 0x013000, length = 0x001000
    RAMGS7 : origin = 0x014000, length = 0x001000
    RAMGS8 : origin = 0x015000, length = 0x001000
    RAMGS9 : origin = 0x016000, length = 0x001000
    RAMGS10 : origin = 0x017000, length = 0x001000
    RAMGS11 : origin = 0x018000, length = 0x001000
    RAMGS12 : origin = 0x019000, length = 0x001000
    RAMGS13 : origin = 0x01A000, length = 0x001000
    RAMGS14 : origin = 0x01B000, length = 0x001000
    RAMGS15 : origin = 0x01C000, length = 0x000FF8
    // RAMGS15_RSVD : origin = 0x01CFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

    /* Flash sectors */
    FLASH0 : origin = 0x080000, length = 0x002000 /* on-chip Flash */
    FLASH1 : origin = 0x082000, length = 0x002000 /* on-chip Flash */
    FLASH2 : origin = 0x084000, length = 0x002000 /* on-chip Flash */
    FLASH3 : origin = 0x086000, length = 0x002000 /* on-chip Flash */
    FLASH4 : origin = 0x088000, length = 0x008000 /* on-chip Flash */
    FLASH5 : origin = 0x090000, length = 0x008000 /* on-chip Flash */
    FLASH6 : origin = 0x098000, length = 0x008000 /* on-chip Flash */
    FLASH7 : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
    FLASH8 : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
    FLASH9 : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
    FLASH10 : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
    FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
    FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
    FLASH13 : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
    CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
    CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800

    CPUTOCMRAM : origin = 0x039000, length = 0x000800
    CMTOCPURAM : origin = 0x038000, length = 0x000800

    CANA_MSG_RAM : origin = 0x049000, length = 0x000800
    CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
    RESET : origin = 0x3FFFC0, length = 0x000002

    CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
    }


    SECTIONS
    {
    codestart : > BEGIN
    .text : >> RAMM0 | RAMM1 | RAMGS1 | RAMGS2 | RAMGS3
    .cinit : > RAMGS4
    .switch : > RAMM0
    .reset : > RESET, TYPE = DSECT /* not used, */

    .stack : > RAMD0
    #if defined(__TI_EABI__)
    .bss : > RAMLS4
    .bss:output : > RAMLS3
    .init_array : > RAMM0
    .const : > RAMLS4
    .data : > RAMLS4
    .sysmem : > RAMLS4
    #else
    .pinit : > RAMM0
    .ebss : > RAMLS4
    .econst : > RAMLS4
    .esysmem : > RAMLS4
    #endif

    ramgs0 : > RAMGS0, type=NOINIT
    ramgs1 : > RAMGS1, type=NOINIT

    MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
    MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
    MSGRAM_CPU_TO_CM > CPUTOCMRAM, type=NOINIT
    MSGRAM_CM_TO_CPU > CMTOCPURAM, type=NOINIT

    dclfuncs : > RAMLS3

    /* CLA specific sections */
    Cla1Prog : >> RAMLS4 | RAMLS5 | RAMLS6 | RAMLS7

    CLADataLS0 : > RAMLS0
    CLADataLS1 : > RAMLS1

    Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, type=NOINIT
    CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, type=NOINIT
    Cla1DataRam : >> RAMLS0 | RAMLS1

    /* CLA C compiler sections */
    //
    // Must be allocated to memory the CLA has write access to
    //
    CLAscratch :
    { *.obj(CLAscratch)
    . += CLA_SCRATCHPAD_SIZE;
    *.obj(CLAscratch_end) } > RAMLS1

    .scratchpad : > RAMLS1
    .bss_cla : > RAMLS1
    .const_cla : > RAMLS1
    cla_shared : > RAMLS1

    .TI.ramfunc : {} > RAMM0

    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

  • Hi,

    I will review and get back to you this Thursday.

    Thanks and regards,
    Vamsi

  • Hi,

    These are symbols added by the linker. In the cmd file -

    Cla1Prog : LOAD = FLASH12,
    RUN >> RAMLS4 | RAMLS5 | RAMLS6 | RAMLS7
    LOAD_START(Cla1funcsLoadStart),
    LOAD_END(Cla1funcsLoadEnd),
    RUN_START(Cla1funcsRunStart),
    LOAD_SIZE(Cla1funcsLoadSize),

    The specified symbols are added at the Load Start Address, End address, etc.

    In the .c or .h files, you can add extern definition and get the address using & operator.

    Eg:

    extern uint32_t Cla1funcsRunStart, Cla1funcsLoadStart, Cla1funcsLoadSize;

    memcpy((uint32_t *)&Cla1funcsRunStart, (uint32_t *)&Cla1funcsLoadStart,
    (uint32_t)&Cla1funcsLoadSize);

    Regards,

    Veena