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LAUNCHXL-F280025C: FSI GPIO qualification async (and SysConfig setup for FSI)

Part Number: LAUNCHXL-F280025C
Other Parts Discussed in Thread: SYSCONFIG, TMDSFSIADAPEVM

Background

Running a 1-leader, 7-node FSI daisy-chain similar to the application note with similar 1-leader and 8-node.
I've worked through the example code and was able to get similar PWM jitter measurements as the application note.

I'm moving the lead and node code into new projects with SysConfig board.h/.c to perform the initializations.

My current configuration is also fairly crude wiring with Dupont-style jumper wires going board-to-board while I work on an comms isolation board, with that I'm running 25 MHz FSI clock (which also helps facilitate easier debugging of how the daisy-chain initializes and responds to node resets etc. with a logic analyzer)

Observations

The SysConfig sections for FSI do not include any checkboxes/dropdowns for setting the GPIOs to be qualification async.
The associated GPIOs selected in the FSI section don't auto-populate anything into the GPIO section (if you populate for example the LED section, the GPIO section auto-populates).
Upon building, the auto-generated board.h/board.c files do not set any qualification for the FSI GPIO pins.

With my new project that doesn't set any qualification on the FSI GPIOs, my PWM jitter has improved significantly, down to 16-20ns (was in the 70ns range)

Two questions

1. How critical is it to set the FSI GPIO pins to qual async if I would like to run the FSI clock up to 50 MHz? I'm not seeing CRC or other errors popping up running at 25 MHz now, though I haven't run it overnight.

2. Where is best to include the GPIO qualification setting function calls? I've included a code snippet of where I've tested the GPIO qualification. the Board_init() is the auto-generated function from SysConfig.

//
// Main
//
void main(void)
{
    Device_init();

    //
    // Initialize PIE and clear PIE registers. Disables CPU interrupts.
    //
    Interrupt_initModule();

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    //
    Interrupt_initVectorTable();

    SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
    //GPIO_setQualificationMode(DEVICE_GPIO_PIN_FSI_RX0, GPIO_QUAL_ASYNC);
    //GPIO_setQualificationMode(DEVICE_GPIO_PIN_FSI_RXCLK, GPIO_QUAL_ASYNC);
    Board_init();
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

  • Hi Jesse,

    My current configuration is also fairly crude wiring with Dupont-style jumper wires going board-to-board while I work on an comms isolation board

    We do have the TMDSFSIADAPEVM evaluation board if you're interested in testing with that instead of a custom PCB.

    The SysConfig sections for FSI do not include any checkboxes/dropdowns for setting the GPIOs to be qualification async.

    I think this is already planned to be added to sysconfig support.

    1. How critical is it to set the FSI GPIO pins to qual async if I would like to run the FSI clock up to 50 MHz? I'm not seeing CRC or other errors popping up running at 25 MHz now, though I haven't run it overnight.

    I've never tested FSI with anything but Async GPIO mode, so I can't say for certain. FSI is an asynchronous module (asynchronous to device system clock) and we do recommend Async mode in our FSI TRM section. The GPIO qualification is a glitch filter which would add delay to the signals going into the FSI receiver. If there's a lot of noise on the signals it could lead to FSI CLK/DATA signals becoming out of sync (depending on qualification used).

    2. Where is best to include the GPIO qualification setting function calls? I've included a code snippet of where I've tested the GPIO qualification. the Board_init() is the auto-generated function from SysConfig.

    Does the Board_init() function reconfigure the GPIO qualification modes? If not, I think where you have them is fine.

    Best,

    Kevin

  • Board_init(), which is auto-generated from SysConfig, only has GPIO qualifications for the LED_GPIO's but does not change anything on the FSI GPIOs. I'm guessing that once SysConfig is modified to include this feature, the FSI GPIO qualifications will be included in one of the functions called within Board_init(), either the PinMux_Init or the FSIRX_Init.

    Are there any other ideas or options to reduce PWM jitter on 7-node daisy-chains?

  • Hi Jesse,

    I'm guessing that once SysConfig is modified to include this feature, the FSI GPIO qualifications will be included in one of the functions called within Board_init(), either the PinMux_Init or the FSIRX_Init.

    I believe so, but I will feedback to the team members working on this to be certain.

    Are there any other ideas or options to reduce PWM jitter on 7-node daisy-chains?

    What's the jitter you're measuring now? And do you have minimum jitter you're trying to achieve for your application?

    Best,

    Kevin