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C2000WARE-DIGITALPOWER-SDK: tidm_02008 control issue


Hi team,

Here's an issue from the customer may need your help:

1) In the tidud61e document, the actual current direction is opposite to the reference direction in the grid-tied state, in the positive half, according to the current reference direction of Figure 2-8 which should be negative.

However, according to the zero-terminal Hall connection of the schematic, current enters from the IP- terminal and the output voltage is lower than the hall mid-point bias. In the sub-program for zero-line current sampling, the Hall output voltage minus the midpoint is biased negative and multiplied by -2.0 is positive (per unit), but the actual and reference current direction is reversed. Why's this?

2) In the current loop calculation program, the error is the current feedback minus reference.

Assuming a reference of 0.5 at some point in the positive half cycle, the current sampling is 0.51 and the error is positive 0.01. Through the current regulator, the corresponding output should be increased such that D is larger so that VxiN is higher. The inductor voltage, the loop resistance voltage drop, the AC voltage drop direction is also the current reference direction according to KVL -VIN+VL+VR+VBUS=0. VBUS = VIN-VL-VR, VL=VIN-VBUS-VR.
The positive half-cycle VIN is positive and the negative half-cycle VIN is negative, which matches the plot block to the right of Figure 2-9.

Higher VxiN means a higher Q3 turn-on duty cycle, resulting in a higher grid-tied current (and reverse reference direction), which becomes positive feedback? Could you help elaborate on the whole process and logic? 

Thanks a lot.

Best Regards,


  • Hi Cherry,

    Q1. I need to clarify your question. More specifically, " the actual and reference current direction is reversed".

    Q2. I don't understand the statement below

    "Higher VxiN means a higher Q3 turn-on duty cycle, resulting in a higher grid-tied current"

    Assuming Vac > 0, the current is in negative direction. The wider d (Q3 duty) makes more negative current and the narrower duty makes less negative current.




  • Hi John,

    Thanks for your support and I've got some clarification as below:

    Set two conditions first, AC power is half-cycle, grid connected. The normal regulation state, during a high frequency switching cycle, current flows from the AC mains neutral to the Hall current negative, whether the inductor is charging or discharging, so the Hall secondary side sensing voltage must be lower than the bias voltage (0.52VCC). The sense voltage minus the bias voltage, negative or zero, is multiplied by -2.0 in the program to get a positive number (or 0), and after entering the current loop assembler, error is different than before. For the sense current minus the transient current reference, assume a transient reference of 0.5 at some point in positive half, a sense current of 0.51, an error of 0.01, the main program has already determined KP=0.34965, Ki=0.002. According to the algorithm, the current loop output is larger than the previous switching cycle and becomes positive feedback (AC feed forward and inductor voltage drop feed forward are not considered here since it works without feed forward) 

    The customer believes that this problem is caused by the fact that the program does not exactly follow the direction of reference.
    Based on the current reference direction given in Figure 2-8 of the tidud61e doc, the total current sampled in the positive half should be processed as negative or 0. Assuming a transient reference of -0.5, detection current of -0.51, at some point in positive half, the error is -0.01, which is the sense current minus the transient current reference. The current loop PI calculation results in a smaller output with a smaller duty cycle, thus reducing the current (opposite direction and reference direction).

    Assuming an AC source, inductor voltage drop, loop resistance drop direction is the same as the current reference direction of Figure 2-8 . VxiN is equivalent to a voltage source, according to KVL, -VIN+VL+VR+VxiN=0, VxiN=VIN-VL-VR, which matches the duty cycle algorithm in PI programs (ignoring VR). VIN is positive in positive half and negative in negative half. The upper deform results in VL=VIN-VR-VxiN, which corresponds to Figure 2-9 left-hand controlled mechanism (plant). 

    Thanks and regards,


  • The hall effect sensor output is fed to inverting amp. The multiplication of -2 is flipping the sign of op-amp output. It does not change the sign of the original measurement. Check the schematic for the details.

    In the positive half cycle, the current reference has to be negative. Assuming the current reference is -0.5 and the feedback current is -0.51. The error is -0.01 and it reduces the duty for the upper switch.