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TMDSCNCD28388D: Question about PHY_CLK

Part Number: TMDSCNCD28388D
Other Parts Discussed in Thread: C2000WARE

Dear team:

c2000ware\C2000Ware_4_01_00_00\libraries\communications\Ethercat\f2838x\examples

When the customer used controlCARD to test this routine, he found that the 25MHz clock source of the PHY was set from GPIO154:

And the customer can connect to the Beckhoff master station during the test routine.

But the schematic of controlCARD shows that the 0 ohm resistor connecting GPIO154 to Px_PHY_CLK is not soldered:

Where does the clock source of PHY_CLK come from?

Best regards,

Green

  • On this board the PHY clock comes from the clock buffer. For etherCAT all clocks for the ESC and PHYs must be derived from the same clock source. You can see this comes from a 25MHz xtal though the clock buffer(U5) and then though R30 and R34. The same 25MHz signal also goes though R43 to the C28x device.

    Regards,
    Cody 

  • Hi Cody:

    I have see that on the controlCARD, the PHY clock comes from the clock buffer. But in the routine which I listed above, the 25MHz clock source of the PHY was set from GPIO154

    Is this a bug of the routine?

    Best regards,

    Green

  • Green, 

    I suppose it could be considered a bug. That does not need to happen since the PHY is already receiving a clock from the clock buffer.

    Please use the clock buffer as a source for the PHY.

    Regards,
    Cody