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TMS320F280025: VREFHI voltage drop at higher PWM frequency

Brian Wang0
Expert 5120 points
Part Number: TMS320F280025

Dears,

My customer noticed all their ADC sampling value becomes higher when the prototype runs at higher PWM frequency. The are using internal reference, VREFHI pull to VSS with a 2.2uF capacitor.

To identify the problem, I suggested them to measure the voltage VREFHI as we noticed the voltage on VrefHI dropped to ~1.1V. After changing 2.2uF to 4.7uF, the voltage raised to ~1.4V(as below picture), but still lower then expected.

As a comparison, here is a scope when high voltage power stage is not working:

May I know why the voltage on Vrefhi varies under different conditions? Is it a correct operation to measure VrefHI directly?

Regards,

Brian

  • 0
    TI__Guru 50430 points

    Hi,

    Due to US holiday, please expect response by tomorrow, Tuesday US time.

    Thanks & Regards,

    Santosh

  • 0
    TI__Expert 7436 points

    Hello Brian,

    Just a few questions:

    - What is the PWM frequency?

    - What is the ACQPS (acquisition window setting)? It is important to ensure that ACQPS setting is consistent with the input circuit to ensure accurate conversions, and this will put a practical limit on how fast the control loop can run. For detailed information on this please refer to "Choosing an Acquisition Window Duration" under "More Information" in the ADC chapter of the device technical reference manual.

    - Can you confirm that there is nothing else connected to the VREFHI pin?

    It is possible to measure VREFHI directly, but have to be careful not to load the pin while doing so (should use a very high impedance probe).

    Thanks,
    Ibukun

  • 0 in reply to Ibukun Olumuyiwa
    TI__Expert 5120 points

    Hi Ibukun,

    As I mentioned we are directly measuring VREFHI instead of looking at the ADC conversion result. Thus I do not think the ACQPS has anything to do with the issue here?

    Regards,

    Brian

  • 0 in reply to Brian Wang0
    TI__Expert 7436 points

    Hello Brian,

    I would like to review the board schematics, especially for the VREFHI driver input and the ADC input pins. Internal ADC conversions should never cause such a loading effect on VREFHI even at max sampling rate.

    Also, please set a breakpoint before the ADC conversion happens (but after ADC is fully powered up), and measure VREFHI to see if it gets up to 1.65V. Related to this: please ensure sufficient time is given for the ADC and internal bandgap to power up before starting conversion. Minimum power up time is specified in the device data sheet.

    Best regards,
    Ibukun