TMS320F280049: Code Composer Studio Link error #10010 program will not fit into available memory

Hi Jeff,

In the linker error, it should say which section is not fitting in the memory. You can increate the size for that section.

If you can post the exact error, I can guide you through this.

Take a look at this links which explains how to split the section into multiple memory section.

https://software-dl.ti.com/ccs/esd/documents/sdto_cgt_Linker-Command-File-Primer.html

Thanks & Regards,

Santosh

Santosh,

Please see attached.

Note line 89-98 shown in main.cpp

Jeff,

Looking at the image, it looks like .ebss section is getting out of memory.

Open the linker command file, and you can add another memory section to use.

Something like below. 

..ebss : >> RAMLS4 | RAMLS5

Thanks & Regards,

Santosh

Santosh,

I changed  

.ebss            : > RAMLS5,    PAGE = 1   

    to

.ebss            : > RAMLS4|RAMLS5,    PAGE = 1  

Link error is

<Linking>
"../28004x_generic_ram_lnk.cmd", line 107: error #10099-D: program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. run placement with alignment/blocking fails for section ".ebss" size 0xf7page 1.  Available memory ranges:
   RAMLS5       size: 0x800        unused: 0x1          max hole: 0x1       
   RAMLS6       size: 0x800        unused: 0x49         max hole: 0x48      
error #10010: errors encountered during linking; "ELS-E105-G1.out" not built
 
>> Compilation failure
makefile:174: recipe for target E105-G1.out' failed
gmake[1]: *** [E105-G1.out] Error 1
makefile:170: recipe for target 'all' failed
gmake: *** [all] Error 2

**** Build Finished ****

Link code is here

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x0000F5, length = 0x00030B

   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Flash sectors */
   /* BANK 0 */
   FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE	/* on-chip Flash */
   FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000	/* on-chip Flash */

   /* BANK 1 */
   FLASH_BANK1_SEC0  : origin = 0x090000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC1  : origin = 0x091000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC2  : origin = 0x092000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC3  : origin = 0x093000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC4  : origin = 0x094000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC5  : origin = 0x095000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC6  : origin = 0x096000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC7  : origin = 0x097000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC8  : origin = 0x098000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC9  : origin = 0x099000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000	/* on-chip Flash */

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x0000F3     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   RAMLS5      : origin = 0x00A800, length = 0x000800
   RAMLS6      : origin = 0x00B000, length = 0x000800
   RAMLS7      : origin = 0x00B800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x002000
   RAMGS1      : origin = 0x00E000, length = 0x002000
   RAMGS2      : origin = 0x010000, length = 0x002000
   RAMGS3      : origin = 0x012000, length = 0x002000
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0, ALIGN(4)
   .text            : >>FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3,   PAGE = 0, ALIGN(4)
   .cinit           : > FLASH_BANK0_SEC1,     PAGE = 0, ALIGN(4)
   .pinit           : > FLASH_BANK0_SEC1,     PAGE = 0, ALIGN(4)
   .switch          : > FLASH_BANK0_SEC1,     PAGE = 0, ALIGN(4)
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .cio             : > RAMLS0,    PAGE = 0
   .stack           : > RAMM1,     PAGE = 1
//   .ebss            : > RAMLS5,    PAGE = 1    Oct18,2022 Jeff JJJJJ this was the original
   .ebss            : > RAMLS4|RAMLS5,    PAGE = 1    Oct18,2022 Jeff JJJJJ jeffs version
   .esysmem         : > RAMLS5,    PAGE = 1   
   .econst          : > FLASH_BANK0_SEC4,    PAGE = 0, ALIGN(4)

   ramgs0           : > RAMGS0,    PAGE = 1
   ramgs1           : > RAMGS1,    PAGE = 1

   .TI.ramfunc      : LOAD = FLASH_BANK0_SEC1,
                         RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)

}

Hi Jeff,

Try something like this:

.ebss            : > RAMLS5 | RAMLS7,    PAGE = 1    // Oct18,2022 Jeff JJJJJ jeffs version

or 

.ebss            : > RAMGS0,    PAGE = 1    //Oct18,2022 Jeff JJJJJ jeffs version

Thanks & Regards,

Santosh

Here is updated one:

.ebss            : >>  RAMLS5 | RAMLS7,    PAGE = 1    // Oct18,2022 Jeff JJJJJ jeffs version

or 

.ebss            : > RAMGS0,    PAGE = 1    //Oct18,2022 Jeff JJJJJ jeffs version

Santosh,

I tried all sorts of combinations none work.

I have several tables (Arrays) that will be reduced in the final version, I tried reducing one of these arrays to see if that helped and it did. So I guess I;m going to live with the smaller heap and stack for now, and then when I shrink the tables I can increase the stack and heap size.

How do I gauge if the stack and heap are large enough at the moment?