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TMDSCNCD280049C: Chip select problem SPI.

Part Number: TMDSCNCD280049C

Hello:

I need to communicate via SPI with a BMS with the TMDSCNCD280049C:

SPI interface timing

For a successful communication I need to wait a minimum of 250 ns from the last clock edge to chip select high (tlag), also I need to load the data in the MOSI line in the falling edge of the previous SCLK.

I configured the SPI, but I am unable to obtain the tlag. Moreover, the SPI clock needs to be at 4 Mhz, and tLEAD also has a maximum. 

In this figure above the SPI behaviour can be seen. There is no time between the last clock edge, and chip select. I tried other approaches like generate the chip select with a PWM and a PWM interrupt and inside sending the SPI command but that approach doesn’t work either because tLEAD exceeds the max time.

Any ideas on how I can solve this using only the SPI module?