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TMS320F28384D: TRM Clarification

Part Number: TMS320F28384D
Other Parts Discussed in Thread: C2000WARE

Hi Team, 

Can you help clarify the information from the TRM below? I found some confusing information.

The TRM mentioned a "Lesser pin count device", checking the TMS320F28384X devices, I only find 176 pin and 337 pin packages, making the 176 the "Lesser pin count device". But, the description about unbounded GPIO contradicts (highlighted above). Can you please clarify?

Thanks.

Regards,

Marvin

  • Marvin,

             I agree it is confusing. Let me research this.

  • Hi Hareesh,

    Thank you for looking into this. I will be waiting for your response.

    Regards,

    Marvin

  • Marvin,

                  I looked into the Boot-ROM source code. It appears the line "On devices in the 176 PTP packages, the pullups for any internally unbonded GPIO must be enabled to prevent floating inputs" is in error and needs to be removed. Take a look at cpu1brom_system_boot.c in C:\ti\c2000\C2000Ware_4_02_00_00\libraries\boot_rom\f2838x\revA\rom_sources\cpu1\F2838x_ROM\bootROM\source. The boot-ROM does enable the pull-up on unbonded pins.

    See below:

    //
    // CPU1BROM_enableUnbondedGpioPullups - Enable unbonded IO pullups for
    //                                      device packages
    //
    void CPU1BROM_enableUnbondedGpioPullups(void)
    {
        //
        // Get package pin count
        //
        uint32_t pin_count = (uint32_t)((uint32_t)(HWREAD_TI_OTP_PARTID_L & 0x00000700UL) >> 8U);
    
        //
        // 6 = 176 pin package
        // 7 = 337 pin package
        //
        if(pin_count == 6U)
        {
            CPU1BROM_enableUnbondedPullupsOn176Pin();
        }
        else
        {
            //
            // 337 pin package - No action
            //
        }
    }

    //
    // CPU1BROM_enableUnbondedPullupsOn176Pin - Enable pullups for the unbonded
    //                                          GPIOs on the 176 package.
    //
    // These below GPIOs are available on the package.
    // GPIOs     Grp Bits
    // 95        C   31
    // 96-98     D   2:0
    // 100-127   D   31:4
    // 128-132   E   4:0
    // 134-159   E   31:6
    // 160-168   F   8:0
    //
    static inline void CPU1BROM_enableUnbondedPullupsOn176Pin(void)
    {
        //
        // Write 0 to unbonded pin in order to pull-up.
        // if an available pin is already pulled-up, then the pin stays pulled-up.
        // Logical AND with 0 does both of these.
        //
        EALLOW;
        HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) &= 0x7FFFFFFFU;    //95
        HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) &= 0x00000008U;    //96-98,100-127 
        HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) &= 0x00000020U;    //128-132,134-159  
        HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) &= 0xFFFFFE00U;    //160-168     
        EDIS;
    }

  • Hi Hareesh,

    If my understanding is correct, the Boot-ROM does enable the pull up on unbounded pins by default as said in the TRM?

    Thank you.

    Regards,

    Marvin

  • Yes, I had stated this in my previous post " The boot-ROM does enable the pull-up on unbonded pins."