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[FAQ] How do I generate the block diagrams generated by C2000 SysConfig? (,,

Other Parts Discussed in Thread: SYSCONFIG

In a SysConfig based C2000 project, I see the tool generates a series of ".dot" files. How do I convert these files to the block diagram visualization in either HTML or SVG files so I can open/view them in CCS?

  • To generate the block diagram HTML file, verify the following settings:

    Go to Project Properties → CCS Build → Variables tab → and set the value to 1 for GENERATE_DIAGRAM 

    if the GENERATE_DIAGRAM does not exist in the project properties, then the template project is missing the post-build steps as well continue on to add the following post build steps.

    Go to Project Properties → CCS Build → Steps tab → Post-build steps → If they are not already there, insert the following lines to the post-build steps at the bottom (each as a single line):

    if ${CLB_DEBUG} == 1  ${NODE_TOOL} "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js"  "${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/"
    if ${CLB_DEBUG} == 1  ./simulation/simulation_output.exe
    if ${CLB_DEBUG} == 1  ${CLB_SIM_COMPILER}/g++ -DCLB_SIM -Og -g -gdwarf-3 -gstrict-dwarf -Wall -Wl,-Map,${BuildDirectory}/simulation/ -L${SYSTEMC_INSTALL}/build/src -o${BuildDirectory}/simulation/simulation_output.exe ${BuildDirectory}/simulation/clb_sim.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_HLC_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_counter_top_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_FSM_top_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_LUT4_top_SC_model.o ${C2000WARE_ROOT}/utilities/clb_tool/clb_syscfg/systemc/src/type3/CLB_OutputLUT_top_SC_model.o -Wl,--start-group -lsystemc -Wl,--end-group

    Rebuild your project, and the diagram should appear under the CPU1_RAM (or the build configuration folder that is currently set as active) → syscfg → clb.html/other html files

  • Note the steps above also applies to generating CLB debug VCD files. The user just has to set the CLB_DEBUG build variable to 1.