• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 83 subscribers
  • Views 186 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D-EP: DxRAM, LSxRAM, GSxRAM, MSGxRAM Initialization

Laurent Z.
Intellectual 285 points
Part Number: TMS320F28377D-EP

Hello,

I would like to understand when should I initialized the different blocks of memory using the following bits from the MEM_CFG_REGS Registers:

  • DxINIT, DxINITDONE
  • LSxINIT, LSxINITDONE
  • GSxINIT, GSxINITDONE

I don't see any example where this is done except when using the CLA where the message RAM CPUtoCLA and CLAtoCPU are initialized:

  • MSGxINIT, MSGxINITDONE

The TRM mentioned:

I am not sure what to do with that. I tried with GS0RAM and my program got stuck waiting for the block to get initialized.

Thank you

Laurent

  • +1
    TI__Mastermind 31525 points

    Hi Laurent,

    GSRAM is shared between CPU1 and CPU2, and the INIT should be done by the owner core only.

    Also, these registers are EALLOW protected register. lease make sure you set EALLOW before writing to the register.

    One reason why we do not have these called in the examples, is that these RAMs are used for storing data or code, which gets initialized during the loading time or _c_int00 time. These gets erased on writing to INIT register

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Intellectual 285 points

    Ohh yes thank you, it works definitely better with EALLOW ;-), I didn't think of that.

    Okay, I get your point.

    So, basically, those functions just clear the memory and set the ECC/PARITY. They don't do any fancy hardware initialization, like what need to be done with the FLASH, is that correct?