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TMS320F28388D: No CLB output after modifying EPWM and intersecting output

Part Number: TMS320F28388D
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE

Hi

I am generating complementary EPWM using the DB module but want to modify EPWM1B before it goes out to the pin. To keep the problem simple to begin with, in the Tile I just ANDed

the input i0 signal (EPWM1B) with a 1. If I set the CLB overriding to Output 2 (EPWM1B) according to the table below all I get is a continuous low coming out on EPWM1B pin when I would expect just a

copy of the original input EPWM1B signal. If I set the overriding to Output 0, EPWM1A pin also goes low, but one sees fine pulses that match the transitions of the EPWM1B. Screenshots attached.

If I assign no overriding output then EPWM1A and 1B appear as "unchanged" PWM as expected on the respective pins.

 as 

    

Ultimately I want to use CMPSS1 to modify EPWM1B as reflected in the CLB setup below. This can occur before or after the TZ module as I will just be ANDing the two signals. But I cannot

even get it to go when I ignore i1 which I have assigned to CMPSS1 (AUXSIG0). I copied clb_ex12 on intersecting outputs extensively but cannot see what I am doing wrong.

I would note that I set up EPWM1 and CMPSS1 without using Sysconfig, instead direct using driverlib. 

Can someone spot what I might being doing wrong?

Thanks

Andrew

  • I would add that the above was done on our own 28388D control board. The same happens on a 28388D Control Card. Furthermore if I run clb_ex12_output_intersect from C2000ware 4.01 on the control card I see only a low and a high on EPWM1A and 2A and no PWM at all, so I assume something in general is not being setup properly.

    Andrew

  • Hi Andrew,

    Thanks for reaching out on E2E forums.

    As a general debug note, you are making sure to initialize and enable the CLB in your program code? The CLB input configuration looks to be correct, I don't see any issues with it.

    For your TILE configuration, you are setting the output of LUT0 to be "i0 & 1". Instead, could you try setting i2 to 1 and then changing the output of LUT0 to be "i0 & i2." You will get some warning about routing constants in your output but you can simply dismiss this warning. This is how I've traditionally routed constants into the output so I'm not sure if the CLB Tool allows entering simply "0" or "1" into the output field.

    Regards,

    Peter

  • Hi Peter

    Thanks for replying. I would like first to get example clb_ex12_output_intersect going. I just down loaded CCS12.2 along with SysConfig_1.15 (before I had 1.13). I also download the latest C2000Ware 4.03 to get the example from. So everything is latest stand. But I see nothing out of EPWM1A on the 28388D Control Card. I am looking on pin 49 on the ControlCARD adapter board. There is no EPWM signal there. In my opinion looking at the example code EPWM2A is having its duty varied and when ANDed with EPWM3A and put on EPWM1A I should see something.

    I am starting to believe the comment by Christian Peters in this post, that manipulating a single EPWM cannot be done:

    TMS320F28388D: CLB will not work if ePWM1 is configured - C2000 microcontrollers forum - C2000Tm︎ microcontrollers - TI E2E support forums

    Can you suggest what I should be seeing and why the example is not producing any output. Is there someone at TI that can verify the example?

    Kind Regards

    Andrew 

  • Hi Andrew,

    I was not getting the correct output for this CLB ex12 example, allow me some time to debug this issue. I believe the ePWMs are not configured correctly for this example. Can you try running the CLB  Lab example from our C2000 Academy located at: https://dev.ti.com/tirex/explore/content/c2000_academy_2_03_00_43_all/modules/c2000_academy_lab/advanced_topics/clb_lab/c2000_lab_clb.html

    This lab example also uses output overriding with the ePWM peripheral and I have tested this example thoroughly. You can find the CCS files at C:\ti\c2000\C2000Ware_4_03_00_00\training\device\f2838x\advance_topics\lab_clb

    Regards,

    Peter

  • Hi Peter

    I got the training example going OK. I also "manually" configured EPWM1B using the driverlib to be the complement of EPWM1A with deadband. When I disable EPWM1A going through the CLB, EPWM1A goes to zero and EPWM1B stays on as expected.

    This is very encouraging and getting close to what we need. I hope you can find out the problem with Ex_12, for this reason I am reluctant to say resolved. Problem is that at the end of the week I am taking 3 weeks vacation, and want to pass on what I found out to my colleagues in S/W. Any chance of resolving Ex 12 before then? It would be helpful to know what the key missing step(s) is/are.

    Kind Regards

    Andrew

  • Hi Andrew,

    I am still debugging this issue. Unfortunately I do not believe that I have quite resolved this issue just yet. From my initial testing, my idea is still that the PWMs are not configured correctly because I have tried removing CLB dependencies and I still do not see any switching on the outputs. In your case, if you see that the CLB override is working correctly with DriverLib configuring the ePWM signals, it may be a SysConfig issue. Can you verify the configuration difference between the SysConfig EPWM configuration and the DriverLib EPWM configuration are the same?

    Regards,

    Peter

  • Hi Peter

    I will try that. What I can say meanwhile is if I change the training example slightly and set up both EPW1A and 1B in Sysconfig, then I can intersect/override the EPWM1A output (Output0) okay, also regardless if I assign input i1 to be EPWM1A or EPWM1B, overriding simply works. But what does not work is trying to intersect/override EPWM1B (Output2). I simply get no PWM output if the override output is set to Output2. Does not matter if i0 is set to EPWM1A or EPWM1B.

    Regards

    Andrew

  • Hi Andrew,

    I've found the issue! And it was an oversight on my part for not noticing this earlier when you sent your original message.

    The way that CLB output overriding works is that a specified OUTLUT output is used to override the peripheral output. 

    From the TRM, you notice that the first output override (Output 0 in SysConfig) is named as CLB1_OUT0_0 and corresponds to PWMA of EPWM1. When you select Output 0 to override, you are telling CLB1 to take the output of OUTLUT 0 and override EPWM1A output with this.

    The corresponding output is tied DIRECTLY to the corresponding OUTLUT output of the CLB instance. So in the lab I sent, if you were to instead have your output in OUTLUT1 and enabled the override for Output 0 in SysConfig, you wouldn't be seeing the right output on the EPWM1A pin. This is because it is taking the output of OUTLUT0 and overriding EPWM1A with that.

    If you are overriding EPWM1B, your output MUST be in OUTLUT 2 of CLB1. Then you can select to override Output 2 and you should see the correct output on the EPWM1B pin.

    Regards,

    Peter

  • Hi Peter

    Last night it suddenly became clear to me what I have been doing wrong as well - and it was just as you posted. The OUTLUT's set in the TILE  have a close mapping to what is set in the CLB output override. I had been using OUTLUT_0 to try and connect to Output 2 in the CLB Setup to intersect with EPWM1B. One has to use OUTLUT_2 like you say.  Maybe the picture I put together (Valid for CLB1) below helps others as well.

    Thanks very much for you efforts.

    Andrew