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TIDM-02009: Calculation of ADC conversion time for 4 samples on same channel

Part Number: TIDM-02009

Hi,

In TIDM-02009, the delay for computing 4 successive conversions of the same ADC channels is given as:

motor1.resolverCompDelay = motor1.sampleTime -
    (ADC_S_H_TIME_NS / 2.0f + ADC_CONV_TIME_NS +
    (ADC_S_H_TIME_NS * 4.0f + ADC_CONV_TIME_NS * 3.0f) / 2.0f) * NS_TO_S;

(trinv.c, line 187)

I would otherwise expect it to be simply:

ADC_S_H_TIME_NS * 4.0f + ADC_CONV_TIME_NS * 4.0f

Where do the extra terms come from?  (These are the parts with the yellow highlights).  

Thanks!

  • Hi Mark,

    For the first ADC_S_H_TIME_NS / 2.0f, it is because the FOC phase current sensing is happening before the resolver ADC sampling, and the trigger is placing the ADC SOC trigger for phase current so that the center of the sampling window aligns with the center point of the PWM zero or period event. As a result, half of the sampling window plus one conversion time is added to the delay of resolver sampling.

    For the /2.0f, it is because we are doing 4x time oversampling, and effectively get the result in the center of the 4x sampling points, which contains 4 sampling windows and 3 conversion periods. 

    Han