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TMS320F280037: The rise / fall time spec of I2C SDA and SCL.

Luke Chen
Expert 4860 points
Part Number: TMS320F280037

Hi champs,

In data sheet I2C Timing Requirements table, we only list the maximum rise and fall time requirements of I2C SDA and SCL for standard mode. However, in fast mode we also list the minimum rise and fall time requirements of these two signals.

In real case if we measure the fall time of SDA/SCL signals, the fall time is less than 1us and this violate the minimum timing requirements in data sheet. My question is that is this minimum rise/fall time for I2C master, slave or both? Is it necessary for I2C module and I2C module will fail to communicate if the minimum timing is violated?

Thanks and regards,

Luke

  • 0
    TI__Guru 55700 points

    Luke,

    I2C rise time / fall time is applicable for both CONTROLLER (master) and TARGET (slave).

    Fall time of 1us definitely violates the I2C spec and you are clearly operating outside the specification. What is your bus capacitance and external pull up resistor used? If you have a such a slow fall time, what is the sink current capability of the device you are using.

    Using stronger pull resistor around 2.2 KOhms is always better and it provide better noise immunity and also allows high bus capacitance for a given I2C speed (standard mode vs fast mode).

    Regards,

    Manoj

  • 0 in reply to Manoj Santha Mohan
    TI__Expert 4860 points

    Manoj,

    Sorry for the typo and confusion.

    I meant in data sheet, we list the MINIMUM fall time requirement is 11.4 ns, MINIMUM rise time requirement is 20 ns, for I2C fast mode. In real case when we measure the SDA and SCL signal, the fall time and rise time usually less than 1ns, for example 600ps. This violates the fall time and rise time minimum requirement in data sheet.

    My question is that is it true I2C fast mode needs minimum SDA/SCL fall time and rise time? Is there any concern if the fall/rise time less than the minimum requirement in data sheet?

    Regards,

    Luke

  • +1 in reply to Luke Chen
    TI__Guru 55700 points

    Luke, 

    Yes, it is important to meet the specification. Typically people add series resistor or / and bypass capacitors to data and clock lines to meet the requirment.

    Regards,

    Manoj