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TMS320F2800157-Q1: Not getting correct PWM capture count

Jay
Prodigy 150 points
Part Number: TMS320F2800157-Q1

Hello,

I want to capture the counter count value, when one of the DCAEVT1 occurs. The DCAEVT1 is happening twice in a cycle (up direction and down direction each (I am using PWM mode in up down mode)).

now I am reading the DCCAP register in one of the timer ISR, which is asynchronous to PWM counter. To get the capture count only when DCAEVT1 occurred in UP direction I am reading register only when EPwm1Regs.TBSTS.bit.CTRDIR = 0, the other configuration are as below,


EPwm1Regs.DCCAPCTL.bit.SHDWMODE = 0;
EPwm1Regs.DCCAPCTL.bit.CAPMODE = 0;

Now as per my understanding if, EPwm1Regs.DCFCTL.bit.PULSESEL = 0, capture register will be updated at counter =PRD, hence gives count value for event happened when counter is in UP direction. but in this case it is giving some times count corresponding to when counter is in down direction.

while if EPwm1Regs.DCFCTL.bit.PULSESEL = 1, then it is giving correct result, don't know how as it is updating at ctr=Zero, is should provide count value corresponding to when counter down direction   

Actually as per requirement, I need to use EPwm1Regs.DCFCTL.bit.PULSESEL = 2, with this configuration, it  is not always capturing count value corresponding to when it is in UP direction.

pls let me know which configuration I need to use, to achieve count captured only during UP direction.

Thank you.

  • 0
    TI__Expert 5935 points

    Hello Jay,

    What's happening here is a bit of a misunderstanding of how PULSESEL works. Taking a look at the DCCAPCTL.CAPMODE register field description:

    Note what I've highlighted.

    Unless I'm mistaken, PULSESEL selects which signal resets a latch- the actual capture event occurs whenever the DC event happens.

    In order to capture the DCEVT when the counter is counting up, set PULSESEL= 1.  With this setting, DCCAP is updated the first time a digital compare event happens after CTR=ZRO, which will be when the counter is counting up.

    Regards,
    Jason Osborn

    Note: Key takeaways from this post are in bold.

  • 0 in reply to Jason Osborn
    Prodigy 150 points

    yeah, what you are saying might be true. But, due to other dependency, I have to use PULSESEL = 2. Is there any way to achieve capture in UP direction (and with other conditions as mentioned above) with PULSESEL = 2 configuration?

    It would be great if you can let me know about this scenario.

    Thank you.

  • +1 in reply to Jay
    TI__Expert 5935 points

    Hello Jay,

    Unfortunately, the only way to do what you're looking for, I believe, is to ensure that you're only retrieving a value for DCCAP after the first DCEVT in up-count mode. This can be achieved relatively simply by setting the digital compare event to trigger an interrupt which stores the current value of DCCAP every alternate trigger. Alternatively, if making an interrupt is not an option, I don't believe I know of a way to do this except by testing both the count direction and the TZFLG[DCxEVTy] register (which must be manually cleared with TZCLR[DCxEVT1]) each time you need to save the contents of DCCAP.

    Regards,

    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 150 points

    Thanks Jason for proving approach using Interrupt .

    But, due to some limitation and software architecture, I am looking for the approach without any use of interrupt and with configuration PULSESEL = 2. 

    Regards,

  • 0 in reply to Jay
    TI__Expert 5935 points

    Hello Jay,

    Unfortunately, as far as I am aware, if neither approach suggested in my previous post is useful to you, there is not another way to achieve this behavior.

    Regards,

    Jason Osborn