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TMS320F28388D: HRPWM on TBPRD with phase shift: save time on hi-isr rate

Alberto Generali
Intellectual 360 points
Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE, SYSCONFIG

Hi all,

My application, on a F28388D, uses 2 ePWM units to drive a phase-shifted full H bridge at a rather high PWM frequency (1 MHz).

The phase shift should be modifiable (of course) but also the PWM frequency should be modifiable (about -/+ 10% respect the nominal 1 MHz).

The straightforward implementation (and the one that requires less writes to ePWM registers during the cyclic interrupt) is to have the output A (ePWM-A) on the left leg going up on the ZERO event and down on the PRD event, and the inverse on the other ePWM module that’s driving the right leg.

The “B” signal to drive the lower mosfet on the same leg is obtained using the inversion in the DB unit.

Using this approach and using EPWMLINK register to link together the 2 ePWM modules, only one write to the TBPHS register of the “left” leg is required (the value is propagated by the EPWMLINK, and the programming is always correct also changing the PWM frequency changing TBPRD).

In this mode I don’t need to write nor use CMPA/CMPB (because the duty is always 50% and the points ZERO / PRD are enough to build a 50% square wave).

And of course this works.

Now i’ve to use the HRPWM mode. Following my understanding of the TRM and looking at the sample code “hrpwm_ex3_prd_updown_sfo.c” in C2000ware, I’ve successfully increased the resolution.

But I notice a strange behaviour:

  • A) If I use CMPA = TBPRD/2, like in the TI sample code to generate the PWM outputs, all the 4 signals (the 2 of the 1st leg of the H bridge, coming out from ePWM2, and the other 2 coming out from ePWM3) are very stable, for any value of HR steps used (I use the AUTOCONV mode as required);
  • B) If instead I use my original idea to use ZERO and PRD to toggle the PWM outputs, the pulses from the 2nd leg (ePWM3, which is linked using EPWMLNK) have a little jitter compared to ePWM2 outputs. The jitter is in the range of 5 ns, which is the equivalent of one TBPRD step.

Do you have any idea or suggestion?

Using option B) would require me to compute and write CMPA = TBPRD/2 to maintain a 50% duty, and this takes some time that is precious for me (being the PWM frequency 1 MHz).

Using option 2 instead the commutations are implicit in the architecture.

Thank you,

Alberto

  • 0
    TI__Expert 4300 points

    Hi Alberto, 

    For ePWM its straight forward and what you mentioned is right.

    HRPWM: while using CMPAHR very closer to ZERO/PERIOD, you will observe 1-3 sysclks of jitter. I would suggest going with option A. 

    Questions:

    1. are you using MEP control on both rising and faling edges? - in this case you cannot use AQ on PRD/ZERO

    - instead, your AQ must be configured to set on rising count and clear on falling count.

    I see you want to try out with option B, it depends on your CMPAHR range you are operating it. It should work, if kept slightly away from PRD/ZERO. 

    You can use sysconfig to input your system requirements( by enabling warnings and other info):

    Best Regards,

    Uttam

  • 0 in reply to Uttam Reddy Pailla
    Intellectual 360 points

    Hi Uttam,

    thank you for your kind and quick reply.

    In fact I've tried both solutons:

    - using A), I put CMPA at 50%, far from both zero and prd. I've set AQ to set on rising and clear on falling, I've selected MEP control on both edges, but really i'm not interested in MEP on edges, I want MEP on PRD, because my application needs to fine tune the generated wave frequency, that's always at 50% duty cycle. If the duty is not perfectly 50% but slightly less or more because of the MEP correction on the PRD, this is not too important. In fact, if I use MEP control on PRD and use CMPA (preset at TBPRD/2) as explained to generate a 50% duty square wave, the generated waveform is perfect. The only drawback is that if I change the frequency (and my application does this, change the frequency of a square wave using HR control of period), I need to also update CMPA to keep the duty near 50%. And this means 2 registers write in an ISR that should take less than 1 uS.

    Is interesting your sentence:

    "1. are you using MEP control on both rising and faling edges? - in this case you cannot use AQ on PRD/ZERO"

    In fact I've tried to use AQ on PRD/ZERO but I've configured MEP on both edges. As I mainly need to control the period with HR resolution, may I try to put AQ on PRD/ZERO but not using MEP on both edges?

    In this case, I will not use CMPA

    thank you

    Alberto

  • 0 in reply to Alberto Generali
    TI__Expert 4300 points

    HI Albreto,

    Let me know if that worked or not? If not, I can look into other possibilities. 

    Best,

    Uttam

  • 0 in reply to Uttam Reddy Pailla
    Intellectual 360 points

    Hi Uttam

    sorry for my late reply.

    I've done some other test.

    Using AQ on ZERO/PRD to set pwm command up/down (and selecting HR on TBPRD) still shows jitter on the 2nd PWM channel (which is configured for HR in the same way but has TBPRDHR updated by EPWMLINK). So I think it's better to use CMPA.

    Using CMPA:

    - I don't use (at least, I don't write) CMPAHR, because I need HR only on PRD;

    - I put CMPA = TBPRD / 2 during configuration;

    - AQ set on CMPA up and AQ clear on CMPA down;

    - never change CMPA, so always far from 0/PRD (is in the middle);

    - during the runtime I update TBPRD in HR mode, following the guidelines in C2000ware example; AUTOCONV is enabled.

    It works (the frequency is changed with HR resolution) but I experience this strange behaviour:

    1) If I update the TBPRDHR when TBPHS is 0, always is OK;

    2) If I update the TBPRDHR when TBPHS is <> 0, there is jitter on the 2nd ePWM channel (where the TBPRDHR is copied by EPWMLINK);

    3) then, I leave the previous TBPRDHR and put TBPHS = 0; the jitter disappear and the frequency is still correct with fractional resolution;

    4) if now I move the TBPHS, all is OK (frequency is correct, no jitter on th 2nd channel).

    I'm doing other tests and I'll write you next days.

    thank you

    Alberto

  • 0 in reply to Alberto Generali
    TI__Expert 4300 points

    Hi Alberto,

    May I know if your issue got resolved ?

    Best, 

    Uttam

  • 0 in reply to Uttam Reddy Pailla
    Intellectual 360 points

    Hi Uttam

    not completely really. With the above settings (AQ on CMPA, basically) I've tested the control board with the real power stage, and the PRD setting with HR resolution works fine - HRSTEP reads mostly as 32 and this is enough for me.

    But the jitter on the 2nd ePWM leg (which has HRTBPRD automatically updated via EPWMLNK) is 0 only if TBPHS is 0.

    If a PHS is applied and the TBPRD is used with HR resolution (= the fractional part is not 0)  there is a jitter on the 2nd leg.

    I have to pospone a little bit further tests because of other urgent issues.

    I'll let you know.

    Thx

    Alberto