Hello,
i'm trying to run the spi as an ssi driver which requires the clock to be high as termination signal but the SPI clock is normally low; is the polarity bit supposed to change this to normally high or is there other registers to allow this to happen? is the McBSP capable of doing such operation ?
i have a channel using the McBSP but changing the CLKXP/CLKRP does not have an effect..
any hints?
br
leong
is the polarity bit supposed to change this to normally high or is there other registers to allow this to happen?
The SPI module on the F28335 supports different clocking schemes which are programmed using the CLKPOLARITY and CLK_PHASE bits. Yes, the CLKPOLARITY bit controls whether the SPI clock pin is normally high or low.
is the McBSP capable of doing such operation ?
i have a channel using the McBSP but changing the CLKXP/CLKRP does not have an effect..
Yes, the McBSP should be capable of keeping the SPI clock high or low. There are two specific timing diagrams in the TRM showing this mode. Are you operating the McBSP in master mode?
