Part Number: TMS320F280038-Q1
Hi experts,
Customer side met a very strange phenomenon:
They use EPWM2 CTR=ZRO to trigger ADC sampling and the end of SOC3 will issue ADC interrupt, but now found that ADC interrupt not happened. So I think it maybe caused by EPWM2 CTR=ZRO event missing. By checking the phase-shift configuration, they enabled PHSEN for EPWM2 and sync signal is from EPWM1, PHS value is 0, PHSDIR is down. Since PWM2 only functions as ADC trigger, so I proposed to disable phase-shift for EPWM2 firstly. By doing this, the problem not happened anymore. So this problem may truly caused by EPWM2 CTR value can not reach to 0 (clock phase-shift for PWM2?).
But now strange things coming, customer add two NOP instructions in the initPWM function (allocate into Flash), and found that even the PHSEN is enabled, the problem will not happened anymore.
The map files for the two cases (case that adding two NOP instructions, and case without NOP) are attached here: https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/171/Init.maphttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/171/addcode.map
Please give your insight about the above phenomenon, thanks.
Regards,
Will
