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LAUNCHXL-F280039C: MCAN polling receive issue

Cherry Zhou
Mastermind 22235 points

Part Number: LAUNCHXL-F280039C
Other Parts Discussed in Thread: C2000WARE

Hi Team,

1) After configuring can as DCAN for polling reception (without interruption), the 500ms task scans CAN data using the following task functions: 

void 500msTask(void)

{

    rxFIFO1st.num = MCAN_RX_FIFO_NUM_1;

    MCAN_getRxFIFOStatus(MCAN_MSG_RAM_BASE, &rxFIFO1st);

    if(rxFIFO1st.fillLvl != 0)
    {

        MCAN_readMsgRam(MCAN_MSG_RAM_BASE, MCAN_MEM_TYPE_FIFO, 0, MCAN_RX_FIFO_NUM_1, &rxMsg1);

    }

}

BUF_NUM = 4;

Send 4 can data at a time, rxFIFO1st.fillLvl = 4, after 4 reads using MCAN_readMsgRam, rxFIFO1st.fillLvl = 0. But why is the rxFIFO1st.fillLvl value not updated after sending can data again? The 500ms task is modified as follows:

void 500msTask(void)

{

    rxFIFO1st.num = MCAN_RX_FIFO_NUM_1;

    MCAN_getRxFIFOStatus(MCAN_MSG_RAM_BASE, &rxFIFO1st);

    if(rxFIFO1st.fillLvl != 0)
    {
        MCAN_readMsgRam(MCAN_MSG_RAM_BASE, MCAN_MEM_TYPE_FIFO, 0, MCAN_RX_FIFO_NUM_1, &rxMsg1);
        MCAN_writeRxFIFOAck(MCAN_MSG_RAM_BASE, MCAN_RX_FIFO_NUM_1, 0);
}

2) What is the meaning of each segment in the MCAN_RXF1C register? What will happen to the corresponding section data after reading through the MCAN_readMsgRam function? 

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Mastermind 41130 points

    Hi Cherry,

    I'm checking with another MCAN expert who is more familiar with a similar issue.

    Best regards,

    Joseph

  • +1 in reply to Joseph Casuga
    TI__Expert 6035 points

    Cherry, 

    1) Please refer to the examples "mcan_ex8_range_filter_receive.c" or "mcan_ex5_mask_filter_receive" within C2000ware for a demonstration on how to read from FIFOs. 

    With the API MCAN_writeRxFIFOAck, which writes to the MCAN_RXF1A register, the get index of the previously read message needs to be written in order to increment the get index. This function call needs to be updated for successful reading of the FIFO. 

    2)

    Cherry Zhou said:
    What is the meaning of each segment in the MCAN_RXF1C register?

    The sections within the MCAN_RXF1C register are explained below:

    F1OM -> Determines the operation of FIFO, in the case when the FIFO is full and the next frame to be stored in that FIFO has been received. Blocking mode means that the new frame is ignored, while overwrite mode means that the new frame replaces the oldest frame stored in the FIFO.

    F1WM -> Configurable mark (fill level of the FIFO) at which an interrupt can be generated. That interrupt may be used to read the FIFO on reaching a certain full level. 

    F1S -> Size of the FIFO as defined by the application during module initialization. 

    F1SA -> Starting Address of the FIFO section within the Message RAM, used by the message handler to read/write from the FIFO.  

    Cherry Zhou said:
    What will happen to the corresponding section data after reading through the MCAN_readMsgRam function? 

    The data remains as is in the Message RAM after reading through above API. The section is only overwritten when it becomes the oldest element of the FIFO.

    Thanks.