Hi Team,
I'm asking for my customer:
Want to know TMS320F28034 this material, what are the requirements for Receive Data Sample Timing?
Best Regards,
Ben
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Hi Team,
I'm asking for my customer:
Want to know TMS320F28034 this material, what are the requirements for Receive Data Sample Timing?
Best Regards,
Ben
Ben,
I am not sure what you mean by Receive Data Sample Timing. Could you please provide some more details?
Best Regards,
Ben Collier
Hi Benjamin,
It's about communication. The picture is the data of the Renesas RX66T, is there any corresponding parameter in the red marked part?
Best Regards,
Ben
Ben,
To clarify again, you are asking about F2803x specification for reception tolerance for SCI?
Hi Ben,
I do not know of an SCI specification that matches the parameter in the images you shared. Are you referring to the SCI sampling error tolerance? The SCI module samples using the SCICLK and a 'majority vote' logic as described in the device TRM:
While there is no spec for this (depends on other variables such as your baud rate, clock dividers, etc.) the SCI clock cycles that surround cycles 4, 5, and 6 in the image above would allow for some error tolerance. Is this information helpful at all to what you are looking for?
Best Regards,
Allison