TMS320F28379D: USB

Please refer to the below from page 110 of www.ti.com/lit/SPRUHM8: 

3.7.3.5 USB Auxiliary Clock (AUXPLLCLK)

The USB module requires a fixed 60-MHz clock for bit sampling. Since the main system clock is usually not a
multiple of 60 MHz, the correct frequency cannot be achieved with a simple divider. Instead, the USB clock is
provided through an auxiliary clock path (AUXPLLCLK), which can use an independent clock source and PLL to
generate the correct frequency.

USB clock tolerances are very tight. As stated in section 7.1.11 of the USB 2.0 specification, low-speed
devices (1.50 Mb/s) have a tolerance of ±1.5%, while high-speed devices (12.000 Mb/s) have a tolerance of
±0.25%. Typically these tolerances are achieved by using an external crystal or resonator as the source for
AUXOSCCLK.