Hello There,
I am trying to use the sysconfig tool with the SDK C2000Ware version 5.01.00.00, but when I add the 'Device Support,' both 'device.h' and 'device.c' files are generated with errors, existing more #if than #endif. This doesn't occur when using the previous version of the SDK (5.00.00.00). Is this some type of bug or requires another configuration I am missing?
Thanks for your guindance,
Ramon,
Hi Siddharth,
The files "device.h" and "device.c" to CPU2, that sysconfig tool generates are with wrong number of macros #if or #endif, it is easy to reproduce:
then, add the device support, and the files generated by sysconfig will be:
//#############################################################################
//
// FILE: device.c
//
// TITLE: Device setup for examples.
//
//#############################################################################
/*
* Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
//#############################################################################
//
// Included Files
//
#include "device.h"
#include "board.h"
#include "clocktree.h"
#ifdef CMDTOOL
#include "device_cmd.h"
#endif
//*****************************************************************************
//
// Function to initialize the device. Primarily initializes system control to a
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
// and enabling the clocks to the peripherals.
//
//*****************************************************************************
void Device_init(void)
{
//
// Disable the watchdog
//
SysCtl_disableWatchdog();
#ifdef CMDTOOL
CMD_init();
#endif
#ifdef _FLASH
#ifndef CMDTOOL
//
// Copy time critical code and flash setup code to RAM. This includes the
// following functions: InitFlash();
//
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
// are created by the linker. Refer to the device .cmd file.
//
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
//
// Call Flash Initialization to setup flash waitstates. This function must
// reside in RAM.
//
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
#endif
#ifdef CPU1
//
// Verify the crystal frequency.
// Note: This check can be removed if you are not using XTAL as the PLL
// source
//
if( ((DEVICE_SETCLOCK_CFG & SYSCTL_OSCSRC_M) == SYSCTL_OSCSRC_XTAL) ||
((DEVICE_SETCLOCK_CFG & SYSCTL_OSCSRC_M) == SYSCTL_OSCSRC_XTAL_SE))
{
if(!Device_verifyXTAL(DEVICE_OSCSRC_FREQ / 1000000))
{
//
// The actual XTAL frequency does not match DEVICE_OSCSRC_FREQ!!
// Please check the XTAL frequency used.
//
// By default, the Device_init function assumes 25MHz XTAL.
// If a 20MHz crystal is used, please add a predefined symbol
// "USE_20MHZ_XTAL" in your CCS project.
// If a different XTAL is used, please update the DEVICE_SETCLOCK_CFG
// macro accordingly.
//
// Note that the latest F2838x controlCARDs (Rev.B and later) have been
// updated to use 25MHz XTAL by default. If you have an older 20MHz XTAL
// controlCARD (E1, E2, or Rev.A), refer to the controlCARD
// documentation on steps to reconfigure the controlCARD from 20MHz to
// 25MHz.
//
ESTOP0;
while(1);
}
}
#endif
Device_initGPIO();
}
//*****************************************************************************
//
// Function to turn on all peripherals, enabling reads and writes to the
// peripherals' registers.
//
// Note that to reduce power, unused peripherals should be disabled.
//
//*****************************************************************************
void Device_enableAllPeripherals(void)
{
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CPUBGCRC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1BGCRC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRCAL);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ERAD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM9);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM10);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM11);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM12);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM13);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM14);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM15);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM16);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP5);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP6);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP7);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCID);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPID);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCANA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS5);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS6);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS7);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS8);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB3);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB4);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB5);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB6);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB7);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB8);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSITXA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSITXB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXB);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXC);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXD);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXE);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXF);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXG);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_FSIRXH);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_PMBUSA);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC0);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC1);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC2);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MPOSTCLK);
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAT);
}
//*****************************************************************************
//
// Function to disable pin locks and enable pullups on GPIOs.
//
//*****************************************************************************
void Device_initGPIO(void)
{
//
// Disable pin locks.
//
GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
GPIO_unlockPortConfig(GPIO_PORT_C, 0xFFFFFFFF);
GPIO_unlockPortConfig(GPIO_PORT_D, 0xFFFFFFFF);
GPIO_unlockPortConfig(GPIO_PORT_E, 0xFFFFFFFF);
GPIO_unlockPortConfig(GPIO_PORT_F, 0xFFFFFFFF);
//
// Enable GPIO Pullups
//
Device_enableUnbondedGPIOPullups();
}
//*****************************************************************************
//
// Function to enable pullups for the unbonded GPIOs on the 176PTP package:
// GPIOs Grp Bits
// 95-132 C 31
// D 31:0
// E 4:0
// 134-168 E 31:6
// F 8:0
//
//*****************************************************************************
void Device_enableUnbondedGPIOPullupsFor176Pin(void)
{
EALLOW;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0x80000000U;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFDFU;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
EDIS;
}
//*****************************************************************************
//
// Function to enable pullups for the unbonded GPIOs on the
// 176PTP package.
//
//*****************************************************************************
void Device_enableUnbondedGPIOPullups(void)
{
//
// bits 8-10 have pin count
//
uint16_t pinCount = ((HWREG(DEVCFG_BASE + SYSCTL_O_PARTIDL) &
(uint32_t)SYSCTL_PARTIDL_PIN_COUNT_M) >>
SYSCTL_PARTIDL_PIN_COUNT_S);
/*
* 6 = 176 pin
* 7 = 337 pin
*/
if (pinCount == 6)
{
Device_enableUnbondedGPIOPullupsFor176Pin();
}
else
{
//
// Do nothing - this is 337 pin package
//
}
}
//*****************************************************************************
//
// Function to verify the XTAL frequency
// freq is the XTAL frequency in MHz
// The function return true if the the actual XTAL frequency matches with the
// input value
//
// Note that this function assumes that the PLL is not already configured and
// hence uses SysClk freq = 10MHz for DCC calculation
//
//*****************************************************************************
#ifdef CPU1
bool Device_verifyXTAL(float freq)
{
//
// Use DCC to verify the XTAL frequency using INTOSC2 as reference clock
//
//
// Enable DCC0 clock
//
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DCC0);
//
// Insert atleast 5 cycles delay after enabling the peripheral clock
//
asm(" RPT #5 || NOP");
//
// Configures XTAL as CLKSRC0 and INTOSC2 as CLKSRC1
// Fclk0 = XTAL frequency (input parameter)
// Fclk1 = INTOSC2 frequency = 10MHz
//
// Configuring DCC error tolerance of +/-1%
// INTOSC2 can have a variance in frequency of +/-10%
//
// Assuming PLL is not already configured, SysClk freq = 10MHz
//
// Note : Update the tolerance and INTOSC2 frequency variance as necessary.
//
return (DCC_verifyClockFrequency(DCC0_BASE,
DCC_COUNT1SRC_INTOSC2, 10.0F,
DCC_COUNT0SRC_XTAL, freq,
1.0F, 10.0F, 10.0F));
}
#endif
//*****************************************************************************
//
// Function to boot CM
// Available bootmodes :
// - BOOTMODE_BOOT_TO_FLASH_SECTOR0
// - BOOTMODE_BOOT_TO_FLASH_SECTOR4
// - BOOTMODE_BOOT_TO_FLASH_SECTOR8
// - BOOTMODE_BOOT_TO_FLASH_SECTOR13
// - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR0
// - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR4
// - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR8
// - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR13
// - BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_S0RAM
// - BOOTMODE_BOOT_TO_S0RAM
// - BOOTMODE_BOOT_TO_USEROTP
//
// Note that while using BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM,
// BOOTMODE_IPC_MSGRAM_COPY_LENGTH_xxxW must be ORed with the bootmode parameter
//
// This function must be called after Device_init function
//
//*****************************************************************************
void Device_bootCM(uint32_t bootmode)
{
//
// Configure the CPU1TOCMIPCBOOTMODE register
//
IPC_setBootMode(IPC_CPU1_L_CM_R,
(BOOT_KEY | CM_BOOT_FREQ_125MHZ | bootmode));
//
// Set IPC Flag 0
//
IPC_setFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG0);
//
// Bring CM out of reset. Wait for CM to go out of reset.
//
SysCtl_controlCMReset(SYSCTL_CORE_DEACTIVE);
while(SysCtl_isCMReset() == 0x1U);
}
#endif
//*****************************************************************************
//
// Error handling function to be called when an ASSERT is violated
//
//*****************************************************************************
void __error__(const char *filename, uint32_t line)
{
//
// An ASSERT condition was evaluated as false. You can use the filename and
// line parameters to determine what went wrong.
//
ESTOP0;
}
and:
//#############################################################################
//
// FILE: device.h
//
// TITLE: Device setup for examples.
//
//#############################################################################
//
// Copyright (C) 2014-2022 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
#ifndef __DEVICE_H__
#define __DEVICE_H__
//
// Included Files
//
#include "driverlib.h"
#include "clocktree.h"
#if (!defined(CPU1) && !defined(CPU2))
#error "You must define CPU1 or CPU2 in your project properties. Otherwise, \
the offsets in your header files will be inaccurate."
#endif
#if (defined(CPU1) && defined(CPU2))
#error "You have defined both CPU1 and CPU2 in your project properties. Only \
a single CPU should be defined."
#endif
//*****************************************************************************
//
// Macro to call SysCtl_delay() to achieve a delay in microseconds. The macro
// will convert the desired delay in microseconds to the count value expected
// by the function. \b x is the number of microseconds to delay.
//
//*****************************************************************************
#define DEVICE_DELAY_US(x) SysCtl_delay(((((long double)(x)) / (1000000.0L / \
(long double)DEVICE_SYSCLK_FREQ)) - 9.0L) / 5.0L)
//*****************************************************************************
//
// Macros related to booting CPU2 and CM. These can be used while invoking the
// functions Device_bootCPU2() and Device_bootCM().
//
// Note that the macros CM_BOOT_FREQ_125MHZ and CPU2_BOOT_FREQ_200MHZ are used
// in the functions Device_bootCM() and Device_bootCPU2() respectively. Please
// update the function and the macros if you are using a different clock
// frequency.
//
//*****************************************************************************
#ifdef CPU1
#define BOOT_KEY 0x5A000000UL
#define CM_BOOT_FREQ_125MHZ 0x7D00U
#define CPU2_BOOT_FREQ_200MHZ 0xC800U
#define BOOTMODE_BOOT_TO_FLASH_SECTOR0 0x03U
#define BOOTMODE_BOOT_TO_FLASH_SECTOR4 0x23U
#define BOOTMODE_BOOT_TO_FLASH_SECTOR8 0x43U
#define BOOTMODE_BOOT_TO_FLASH_SECTOR13 0x63U
#define BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR0 0x0AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR4 0x2AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR8 0x4AU
#define BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR13 0x6AU
#define BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM 0x0CU
#define BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_S0RAM 0x0CU
#define BOOTMODE_BOOT_TO_M0RAM 0x05U
#define BOOTMODE_BOOT_TO_S0RAM 0x05U
#define BOOTMODE_BOOT_TO_USEROTP 0x0BU
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_100W 0x10000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_200W 0x20000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_300W 0x30000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_400W 0x40000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_500W 0x50000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_600W 0x60000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_700W 0x70000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_800W 0x80000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_900W 0x90000U
#define BOOTMODE_IPC_MSGRAM_COPY_LENGTH_1000W 0xA0000U
#endif
//*****************************************************************************
//
// Defines, Globals, and Header Includes related to Flash Support
//
//*****************************************************************************
#ifdef _FLASH
#include <stddef.h>
#ifndef CMDTOOL
extern uint16_t RamfuncsLoadStart;
extern uint16_t RamfuncsLoadEnd;
extern uint16_t RamfuncsLoadSize;
extern uint16_t RamfuncsRunStart;
extern uint16_t RamfuncsRunEnd;
extern uint16_t RamfuncsRunSize;
#endif
#define DEVICE_FLASH_WAITSTATES 3
#endif
//*****************************************************************************
//
// Function Prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup device_api
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
//! Function to initialize the device. Primarily initializes system
//! control to a known state by disabling the watchdog, setting up the
//! SYSCLKOUT frequency, and enabling the clocks to the peripherals.
//!
//! \param None.
//! \return None.
//
//*****************************************************************************
extern void Device_init(void);
//*****************************************************************************
//!
//!
//! @brief Function to turn on all peripherals, enabling reads and writes to the
//! peripherals' registers.
//!
//! Note that to reduce power, unused peripherals should be disabled.
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_enableAllPeripherals(void);
//*****************************************************************************
//!
//!
//! @brief Function to disable pin locks on GPIOs.
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_initGPIO(void);
//*****************************************************************************
//!
//! @brief Function to enable pullups for the unbonded GPIOs on the 176PTP package:
//! GPIOs Grp Bits
//! 95-132 C 31
//! D 31:0
//! E 4:0
//! 134-168 E 31:6
//! F 8:0
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_enableUnbondedGPIOPullupsFor176Pin(void);
//*****************************************************************************
//!
//! @brief Function to enable pullups for the unbonded GPIOs on the
//! 176PTP package.
//!
//! @param None
//! @return None
//
//*****************************************************************************
extern void Device_enableUnbondedGPIOPullups(void);
//*****************************************************************************
//
//! @brief Function to boot CM
//!
//! \param bootmode is the mode in which CM should boot.
//!
//! Available bootmodes :
//! - BOOTMODE_BOOT_TO_FLASH_SECTOR0
//! - BOOTMODE_BOOT_TO_FLASH_SECTOR4
//! - BOOTMODE_BOOT_TO_FLASH_SECTOR8
//! - BOOTMODE_BOOT_TO_FLASH_SECTOR13
//! - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR0
//! - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR4
//! - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR8
//! - BOOTMODE_BOOT_TO_SECURE_FLASH_SECTOR13
//! - BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_S0RAM
//! - BOOTMODE_BOOT_TO_S0RAM
//! - BOOTMODE_BOOT_TO_USEROTP
//!
//! Note that while using BOOTMODE_IPC_MSGRAM_COPY_BOOT_TO_M1RAM,
//! BOOTMODE_IPC_MSGRAM_COPY_LENGTH_xxxW must be ORed with the bootmode parameter
//!
//! This function must be called after Device_init function
//! \return None.
//
//*****************************************************************************
extern void Device_bootCM(uint32_t bootmode);
//*****************************************************************************
//
//!
//! @brief Function to verify the XTAL frequency
//! \param freq is the XTAL frequency in MHz
//! \return The function return true if the the actual XTAL frequency matches with the
//! input value
//
//*****************************************************************************
extern bool Device_verifyXTAL(float freq);
#endif
//*****************************************************************************
//!
//! @brief Error handling function to be called when an ASSERT is violated
//!
//! @param *filename File name in which the error has occurred
//! @param line Line number within the file
//! @return None
//
//*****************************************************************************
extern void __error__(const char *filename, uint32_t line);
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
#endif // __DEVICE_H__
This files have errors(number of macros #if and #endif doesn't match).
Is it a bug, or i'm doing something wrong?
Thanks for reply,
Ramon