• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 292 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TMS320F2800157: I2C detect whether slave is ready with Data.

TMS320F2800157: Clear TX or RX buffer fully

Kaustuv Mandal
Prodigy 130 points

Part Number: TMS320F2800157

Tool/software:

Hi TI Team

What is the standard way to clear the TX or Transmission buffer and RX or Receive buffer once a data is already transmitted or Received respectively?

Kindly provide code snippet for the above problem.

Regards

Kaustuv

  • 0
    TI__Mastermind 19075 points

    Hi Kaustuv,

    I2C hardware should take care of this already. However, there may be cases where you need to do this software. 

    This would depend on whether you are using FIFO or non-FIFOs.

    For FIFO, you can simply check the status of the TX / RX FIFO in I2CFFRX and clear the buffer by doing a dummy read of the buffer as you are trying to clear the FIFO.

    For non-FIFO, you can check the status of the TX buffer in I2CSTR and clear the buffer by setting the I2CCNT to 0. Please note that you need to specifically ensure that all data has been sent by checking the bus status, what’s in the buffer, etc. 

    You can check the status of the RX buffer using I2CSTR.RRDY and then perform a dummy read of the buffer to clear/discard data. This signals the I2C that there is no more data to be sent.

    Best Regards,

    Aishwarya