Tool/software:
While working with DSP F28335 board I have faced issue regarding output computation.
I was doing Grid connection, for that I have designed PLL(Phase lock loop). My switching frequency for EPWM was 10kHz, simulation time 1/20kHz and DSP clock for EPWM was 200MHz.
While running the hardware I have observed that when my switching frequency is less then 10kHz the output is coming out properly but as soon as I increases the switching frequency beyond 8kHz it is unable to compute the output.
The GPIO pin starts toggling at one-fourth of the simulation frequency and output is not coming out properly.
What could be done to make it work?
I have mentioned the data I have used in my simulation
fsw=10000; %carrier fz
Tinv=1/fsw; %200e-6
Tsim = Tinv*0.5;% 5e-5;%simulation time%100e-6
clk=200e6; %system clk
tbprd=Tinv*clk/2;
GPIO toggling at = 5Khz when EPWM block's are uncommented
GPIO toggling at = 10kHz when EPWM block's ae comment out
ADC start of conversion is set at EPWM A.
