• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 82 subscribers
  • Views 74 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28P559SJ-Q1: Low power mode (IDLE, STANDBY, HALT) and C28x / NPU interaction?

AnBer
Mastermind 29520 points
Part Number: TMS320F28P559SJ-Q1

Tool/software:

Team,

I assume that the C28x and NPU synchronization is interrupt driven. Correct?
Can you describe how this sync mechanism (C28x to NPU, NPU to C28x) working in more details?

Can the NPU work asychronously to the C28x?
What I mean is if the C28x is put in low power (IDLE, STANDBY, HALT - see F28P55 TRM spruj53 section 3.10) is the NPU still able to finish it's computing sequence and save results in Flash/RAM?
Can you describe the CPU and NPU interaction for the different low power mode (IDLE, Standby, HALT)?

Thanks in advance,

Anthony