• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 82 subscribers
  • Views 204 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F2800156-Q1: SYSPLLCTL1 Register

Samuel Li
Intellectual 410 points
Part Number: TMS320F2800156-Q1
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Development envirement:

MCU: TMS320F2800156-Q1

TRM: TMS320F280015x Real-Time Microcontrollers Technical Reference Manual_RevB_.pdf

CCS: 12.7

SDK: C2000Ware_5_02_00_00

According to the description of TRM, whenever the user changes the clock source using these bits of OSCCLKSRCSEL,

theSYSPLLMULT[13:0] register will be forced to zero and the PLL will be bypassed and powered down. But when I switched

the clock source from XTAL to INTOSC2, the SYSPLLCTL1.PLLCLKEN and SYSPLLCTL1. PLLEN still remained at 1 and did not become 0.

I want to know why.

Code(Just for debug)

register

/BR

Samuel

  • 0
    TI__Genius 13555 points

    Hi Samuel,

    Yes below is correct upon changing source in OSCCLKSRCSEL, the SYSPLLMULT[0:13] will be zeroed and PLL is not locked anymore.

    Have a look at the SYSPLLSTS[LOCKS] bitfield in the register view. If the LOCKS is 0 that means SYSPLL is not locked.

    You can check that by XCLKOUT monitoring of SYSPLL (o/p of the PLL).

    Samuel Li said:

    According to the description of TRM, whenever the user changes the clock source using these bits of OSCCLKSRCSEL,

    theSYSPLLMULT[13:0] register will be forced to zero and the PLL will be bypassed and powered down

    Thanks.

  • 0 in reply to Prarthan Bhatt
    Intellectual 410 points

    Hi Prathan,

    When I switch the clock source from XTAL to INTOSC2, the PLL(SYSPLLCTL1) is not bypassed and powered down and SYSPLLSTS[LOCKS] is not locked.

    /BR

    Samuel

  • 0 in reply to Samuel Li
    TI__Genius 13555 points

    Hi Samuel,

    You can also route the PLLSYSCLK on the XCLKOUT and see that PLL is not locked or bypassed when the clock source is changed and the LOCKS bit shows that change.

    Did you have any question ? Thats what I said in my previous reply as well.

    Thanks