TMS320F28379S: XDS110: Jtag chain (two processors): Issues with verifying flash when using dslite

stevenh

Guru 20075 points

Part Number: TMS320F28379S
Other Parts Discussed in Thread: UNIFLASH, C2000WARE, SYSCONFIG

Hello,

I chained the JTAG of two TMS320F28379S processors and then used dslite to program them. Now I am trying to verify the code was successfully flashed.

Here is the dslite verification command and output:
dslite -v -c TMS320F28379S_CPU1_TargetConfigurationDaisyChain_XDS110.ccxml CPU1_TMS320F28379S.out
C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
error: C28xx_CPU1: File Loader: Verification failed: Memory map prevented reading 0x007F00@Program
Failed: File: CPU1_TMS320F28379S.out: Load failed.

Here is the ccxml file ( I changed the extension so I could upload it):

TMS320F28379S_CPU1_TargetConfigurationDaisyChain_XDS110.txt

How can I fix the Memory map issue?

1 month ago

0 Matt Kukucka 1 month ago

TI__Mastermind 18030 points

Hello,

0x7F00 is not in the C28x memory map for F2837 (mapped to the peripheral registers memory map, none of the device peripherals have program bus access). Are you able to verify the flash using the same .out in CCS/UniFlash?

Best,

Matt

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

I get the same error in UniFlash. CCS doesn't give the same error, however, I don't see any indication it is verifying the flash (even though I set verification to full verification as shown below). How do I fix it in UniFlash and dslite? Also, is CCS performing the verification?

0 Matt Kukucka 1 month ago in reply to stevenh

TI__Mastermind 18030 points

You can verify the program against the flash through CCS by navigating to Run > Load > Verify Program... after connecting to the device.

Can you also share your .map file as well?

Best,
Matt

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

Ok, that also gives the same failure: C28xx_CPU1: File Loader: Verification failed: Memory map prevented reading 0x007F00@Program

This seems to be the issue:
.TI.memcrc
* 0 00007f00 0000001e
00007f00 0000001e (.TI.memcrc:_ccs_flash_checksum)

That is what is probably causing the following warning that is showing up in the console: "C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable"

However, aren't the registers located in that memory region?

0 Matt Kukucka 1 month ago in reply to stevenh

TI__Mastermind 18030 points

Hello,

Matt Kukucka said:
0x7F00 is not in the C28x memory map for F2837 (mapped to the peripheral registers memory map, none of the device peripherals have program bus access).

That's right, but they are not accessible from the program bus (and not in the C28x memory map) and are therefore not accessible to the C28x.

Best,
Matt

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

Ok, what could be causing the ccs_flash_checksum to be put at that address?

I already posted the linker comand file at (+) TMS320F28379S: Code Composer 12.1:C28xx_CPU1: Loader: One or more sections of your program falls into a memory region that is not writable. - C2000 microcontrollers forum - C2000︎ microcontrollers - TI E2E support forums.

+1 Matt Kukucka 1 month ago in reply to stevenh

TI__Mastermind 18030 points

Hello,

I don't think the CRC is causing the warning. Please refer to lines 75-79 in your linker command file:

	GpioCtrlRegsFile  	: > GPIOCTRL, 	PAGE = 0
	GpioDataRegsFile  	: > GPIODATA, 	PAGE = 0
	PieCtrlRegsFile   	: > PIECTRL, 	PAGE = 0
	ScibRegsFile    	: > SCIB,     	PAGE = 0
	ClkCfgRegsFile    	: > CLKCFG, 	PAGE = 0

These lines are unnecessary and should be removed.

Best,
Matt

+1 stevenh 1 month ago in reply to stevenh

Guru 20075 points

I think I am close to fixing this issue. I removed the register ranges from the linker command file and added the F2837x_Headers_nonBIOS_cpu1.cmd command file:

Fullscreen 4572.2837xS_FLASH_lnk_cpu1.txt Download

MEMORY
{

PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   RAMM           	: origin = 0x000002, length = 0x0007F6   /* on-chip block M0 and M1 */
   // RAM1_RSVD     : origin = 0x0007F8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   FREERTOS_STACK_RAMLS : origin = 0x008000, length = 0x002000 //End Address = 0x009FFF
   RAMLS_AND_RAMGS      : origin = 0x00A000, length = 0x011FF8 //0x00A000+0x011FF8-1 = End Address = 0x01BFF7
   // RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Carve out a section of FLASH to store the CRC result */

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 20012000
GROUP
{      /* GROUP memory ranges for crc/checksum of entire flash */
   #endif
#endif

   /* Flash sectors */
   BEGIN              : origin = 0x080000, length = 0x000002
   FLASH0             : origin = 0x080002, length = 0x03FFFE  //0x03FFFF 0x07FFEE
   //FLASH1_DO_NOT_USE1 : origin = 0x0C0000, length = 0x001000
   FLASH1             : origin = 0x0C0000, length = 0x03FFE0   //0x03FFFF 0x07FFEE   FLASH0
#ifdef __TI_COMPILER_VERSION__
  #if __TI_COMPILER_VERSION__ >= 20012000
}  crc(_ccs_flash_checksum, algorithm=C28_CHECKSUM_16)
  #endif
#endif

   CRC_PRELUDE        : origin = 0x0FFFE0  length = 0x000010
   FLASH1_DO_NOT_USE2 : origin = 0x0FFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

PAGE 1 : /* Data Memory */
   EXTERNAL_SRAM_CS3: origin = 0x0300000, length = 0x80000

}

SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .text               : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   codestart           : > BEGIN                           PAGE = 0, ALIGN(4)

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM                            PAGE = 0
   .switch             : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .reset              : > RESET,                          PAGE = 0, TYPE = DSECT /* not used, */

   .init_array         : > FLASH0,                         PAGE = 0, ALIGN(4)
   .bss                : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:output         : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:cio            : > RAMLS_AND_RAMGS,                PAGE = 0
   .data               : > RAMLS_AND_RAMGS,                PAGE = 0
   .sysmem             : > RAMLS_AND_RAMGS,                PAGE = 0

   .freertosStaticStack : > FREERTOS_STACK_RAMLS           PAGE = 0

   /* Initalized sections go in Flash */
   .const              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)

   Filter_RegsFile     : > RAMLS_AND_RAMGS,	               PAGE = 0

   ramgs0              : > RAMLS_AND_RAMGS,                PAGE = 0
   ramgs1              : > RAMLS_AND_RAMGS,                PAGE = 0

   TRACEBACE_SECTION : > EXTERNAL_SRAM_CS3,                PAGE = 1

   .TI.memcrc > CRC_PRELUDE                                PAGE = 0



#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
  .TI.ramfunc : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #else
     ramfuncs : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #endif
#endif

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

As you can see in the linker command file, I added CRC_PRELUDE memory range for the crc. In doing so, I had to move FLASH1_DO_NOT_USE2 outside of GROUP so there wouldn't be any memory gaps.

However, when I link the code the following error occurs:
<Linking>
warning #10247-D: creating output section ".freertosHeap" without a SECTIONS specification
"../EH/cmd/2837xS_FLASH_lnk_cpu1.cmd", line 77: error #10099-D: program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. placement with alignment/blocking fails for section ".TI.memcrc" size 0x18 page 0. Available memory ranges:
CRC_PRELUDE size: 0x10 unused: 0x10 max hole: 0x10
error #10010: errors encountered during linking; "HMV_v3_FreeRTOS_CPU1_TMS320F28379S.out" not built

I built it without the CRC_PRELUDE and I can see there is enough flash space for the CRC. Therefore, why am I getting this linker error?

Also, LAUNCHXL-F28379D: Running FreeRTOS project on F28379D launchpad - C2000 microcontrollers forum - C2000

︎ microcontrollers - TI E2E support forums said that the freertos heap should be placed in the memory range 0x0000 to 0xFFFF. I can understand the stack being in that memory range, but why does the heap also have to be there? currently, it is being placed at 0x0047000 because the .freertosHeap section hasn't been defined.

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

0x0047000 is outside the RAM range. Therefore, the .freertosHeap section needs to be set to a valid RAM range. Does the heap have to be put in the range 0x0000 to 0xFFFF?

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

Here is what it actually shows in the map file for .freertosheap:
.freertosHeap: load addr=000c7068, load size=00000004 bytes, run addr=00047000, run size=00000400 bytes, compression=zero_init
.freertosStaticStack: load addr=000c706c, load size=00000004 bytes, run addr=00008000, run size=00001bf0 bytes, compression=zero_init

+1 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

Ok, I think I fixed it. It now builds without any linker errors or warnings.

Here is my newest linker command file:

Fullscreen 6523.2837xS_FLASH_lnk_cpu1.txt Download

MEMORY
{

PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   RAMM           	: origin = 0x000002, length = 0x0007F6   /* on-chip block M0 and M1 */
   // RAM1_RSVD     : origin = 0x0007F8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   FREERTOS_STACK_RAMLS : origin = 0x008000, length = 0x002000 //End Address = 0x009FFF
   RAMLS_AND_RAMGS      : origin = 0x00A000, length = 0x011FF8 //0x00A000+0x011FF8-1 = End Address = 0x01BFF7
   // RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Carve out a section of FLASH to store the CRC result */

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 20012000
GROUP
{      /* GROUP memory ranges for crc/checksum of entire flash */
   #endif
#endif

   /* Flash sectors */
   BEGIN              : origin = 0x080000, length = 0x000002
   FLASH0             : origin = 0x080002, length = 0x03FFFE  //0x03FFFF 0x07FFEE
   //FLASH1_DO_NOT_USE1 : origin = 0x0C0000, length = 0x001000
   FLASH1             : origin = 0x0C0000, length = 0x03FFE0   //0x03FFFF 0x07FFEE   FLASH0
#ifdef __TI_COMPILER_VERSION__
  #if __TI_COMPILER_VERSION__ >= 20012000
}  crc(_ccs_flash_checksum, algorithm=C28_CHECKSUM_16)
  #endif
#endif

   CRC_PRELUDE        : origin = 0x0FFFE0  length = 0x000010
   FLASH1_DO_NOT_USE2 : origin = 0x0FFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

PAGE 1 : /* Data Memory */
   EXTERNAL_SRAM_CS3: origin = 0x0300000, length = 0x80000

}

SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .text               : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   codestart           : > BEGIN                           PAGE = 0, ALIGN(4)

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM                            PAGE = 0
   .switch             : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .reset              : > RESET,                          PAGE = 0, TYPE = DSECT /* not used, */

   .init_array         : > FLASH0,                         PAGE = 0, ALIGN(4)
   .bss                : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:output         : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:cio            : > RAMLS_AND_RAMGS,                PAGE = 0
   .data               : > RAMLS_AND_RAMGS,                PAGE = 0
   .sysmem             : > RAMLS_AND_RAMGS,                PAGE = 0

   .freertosStaticStack : > FREERTOS_STACK_RAMLS,          PAGE = 0

   /* Initalized sections go in Flash */
   .const              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)

   Filter_RegsFile     : > RAMLS_AND_RAMGS,	               PAGE = 0

   ramgs0              : > RAMLS_AND_RAMGS,                PAGE = 0
   ramgs1              : > RAMLS_AND_RAMGS,                PAGE = 0

    // FreeRTOS Heap
    .freertosHeap  : > FREERTOS_STACK_RAMLS,               PAGE = 0

   TRACEBACE_SECTION : > EXTERNAL_SRAM_CS3,                PAGE = 1

   //.TI.memcrc > CRC_PRELUDE                                PAGE = 0



#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
  .TI.ramfunc : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #else
     ramfuncs : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #endif
#endif

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Also, I don't think I have to create ucHeap in the application because freertos is already creating it as shown by its entry in the map file:
00009bf0 26f (00009bc0) ucHeap

My FreeRTOS configuration sets the Total Heap Size to 0x400.

Did TI change the requirements for creating ucHeap?

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

How would I determine how much heap space is required for FreeRTOS? Currently, I have both "Support Static Allocation" and "Support Dynamic Allocation". Is it necessary to set both and how would I know if the application needed "Support Dynamic Allocation"?

0 stevenh 1 month ago in reply to Matt Kukucka

Guru 20075 points

If I unselect "Support Dynamic Allocation", I get the following build error:
subdir_rules.mk:106: recipe for target 'heap_4.obj' failed
"C:/ti/c2000/C2000Ware_5_01_00_00/kernel/FreeRTOS/Source/portable/MemMang/heap_4.c", line 50: fatal error #35: #error directive: This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
1 catastrophic error detected in the compilation of "C:/ti/c2000/C2000Ware_5_01_00_00/kernel/FreeRTOS/Source/portable/MemMang/heap_4.c".
Compilation terminated.
gmake[1]: *** [heap_4.obj] Error 1

0 stevenh 1 month ago in reply to stevenh

Guru 20075 points

Hello Matt,

I guess the only issues I have left are the following:
1. I would like to only select FreeRtos's "Support Static Allocation". Is that possible? According to FreeRTOS heap memory management - FreeRTOS , Static Allocation doesn't require a Heap.
2. If a Heap is required, does it need to be in the 0x0000 to 0xFFFF memory range?

0 Matt Kukucka 1 month ago in reply to stevenh

TI__Mastermind 18030 points

Hello,

I've looped in the FreeRTOS expert on our team to assist you further, I will check back in tomorrow if they don't reply.

Best,
Matt

0 Arnav Menon R 1 month ago in reply to Matt Kukucka

TI__Expert 3465 points

Hi Steven,

1) Yes, you can select only Static Allocation. In this case, you will need to remove the heap_x.c file from the project build sources

2) Yes the heap must be placed in the 0x0000-0xFFFF range. This is because the C28x CPU has a 16-bit Stack Pointer, so any regions that may be used as stack must be placed within those limits.

Let me know if you have any other issues

Regards,

Arnav

0 stevenh 1 month ago in reply to Arnav Menon R

Guru 20075 points

Hello Arnav,

Arnav Menon R said:
1) Yes, you can select only Static Allocation. In this case, you will need to remove the heap_x.c file from the project build sources

I don't include heap_x.c (i.e. heap_4.c for my build case) in the project. That file is included by sysconfig during the build process. Therefore, there isn't any way for me to exclude it from the build. If I removed "use dynamic", an error occurs because it says it can't find heap_4.c.

Also, how would I determine how much heap space freeRTOS requires. I would think that sysconfig would be able to determine that at build time for a static build.

Furthermore, currently I have both "use static" and "use dynamic" selected at the same time. Is it actually doing both? or does it default to "use dynamic"?

Arnav Menon R said:
2) Yes the heap must be placed in the 0x0000-0xFFFF range. This is because the C28x CPU has a 16-bit Stack Pointer, so any regions that may be used as stack must be placed within those limits.

I had thought heap was general memory and therefore not exactly associated with the stack.

0 Arnav Menon R 1 month ago in reply to stevenh

TI__Expert 3465 points

1) The heap_x file include is an issue that has been rectified in later versions of C2000Ware. I would recommend upgrading , since there have been quite a few updates since 5.01. Amount of heap will vary based on application, you can monitor peak usage using the FreeRTOS ROV (also introduced in later versions of C2000Ware and CCS)

FreeRTOS treats the static and dynamic flags as individual configurations.

2) If a task is created dynamically, its SW stack will be allocated from the heap. Therefore the CPU stack pointer will be at a location in the heap at some point

Regards,

Arnav

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28379S: XDS110: Jtag chain (two processors): Issues with verifying flash when using dslite