1 -Less Active Power, maybe using 65nm CMOS technology like Concerto.
2 -ADC with at least 5 MSPS and without first sample issue. There lower cost Microcontrollers out there with multiples 5 MSPS ADCs.
3- More performance and more SRAM in lower pin count packages. ex. 100 MHZ with 40 Kbytes SRAM in a 64 LQFP package.
