PWM clock

Jaspreet Kaur Mann

Intellectual 625 points

Hello,

I'm trying to run ePWM module at 200kHz using a 80MHz clock on F28069.

I'm using PWMDRV_1ch_CLA_C to perform this task. I load the period register with a value of 400.

As a result, I observe 100kHz clock on the oscilloscope instead of 200kHz.

I don't know where this factor of 2 is coming from.

Any idea?

Sincerely,

Jaspreet

over 12 years ago

0 Brett Larimore over 12 years ago

TI__Guru 57255 points

Jaspreet,

The PWMDRV_1ch_CLA_C function that you describe only updates the PWM settings.

Are you calling the PWM_1ch_Cnf() function in your C28x main file as needed? If so, what arguments are you giving it?

Thank you,
Brett

0 Jaspreet Kaur Mann over 12 years ago in reply to Brett Larimore

Intellectual 625 points

Hello Brett,

Yes, I'm calling the function in main.c using the arguments

PWM_1ch_Cnf (2, 400, 1, 0).

Sincerely,

Jaspreet

0 Brett Larimore over 12 years ago in reply to Jaspreet Kaur Mann

TI__Guru 57255 points

Jaspreet,

This looks to be the correct configuration.

The next thing I'd look at is the clocking. Are you using the internal oscillator or an external crystal? What PLL settings have you chosen?

You can confirm that your SYSCLK is 80MHz by configuring XCLKOUT to output from a pin by modifying the GPIO mux. There will be some dividers in the path from SYSCLK to XCLKOUT by default, but the 'System Control and Interrupts' section of the TRM should guide you to what the default dividers will be.

Thank you,
Brett

0 Jaspreet Kaur Mann over 12 years ago in reply to Brett Larimore

Intellectual 625 points

Hello Brett,

I'm using internal oscillator with PLLset(0x10).

I have checked the XCLKOUT on GPIO18, its approximately 12.5ns. The dividers are set to default. The TB_CLK and HPS_CLK dividers are set to 1.

Any idea what might be going wrong?

Sincerely

Jaspreet

0 Brett Larimore over 12 years ago in reply to Jaspreet Kaur Mann

TI__Guru 57255 points

Jaspreet,

I still do not see your issue. I assume that "are set to 1" means that both are set to TB_DIV1.

One other thought is to look at the key PLL and divider register bits in your watch window and confirm that they are being set correctly. You may see a difference if you are writing to an EALLOW protected register but not writing EALLOW.

If this doesn't help, feel free to post your project (or your initialization code). I (or someone else in the community) may take a look when we are able.

Thank you,
Brett

0 Jaspreet Kaur Mann over 12 years ago in reply to Brett Larimore

Intellectual 625 points

2402.DPLibTemplate-F2806x PreRelease.zip

Hello Brett,

I couldn't find any error in the PLL register bits. I attach the Excel sheet for review in case I have missed something.

Yes, the HSPCLKDIV and the TBCLK are set to TB_DIV1.

As you said, I'm attaching the complete project for everyone to debug and probably point out the error.

Sincerely,

Jaspreet

0 Brett Larimore over 12 years ago in reply to Jaspreet Kaur Mann

TI__Guru 57255 points

Jaspreet,

I just ran your project on my computer and I didn't have any problems.

I changed the PWM config line at the bottom of the main file from 200 to 400 and saw a 200kHz PWM waveform on my oscilloscope.

See attached image.

Thank you,
Brett

0 Jaspreet Kaur Mann over 12 years ago in reply to Brett Larimore

Intellectual 625 points

Hello Brett,

I get the same results in the register window apart from the fact that there is no EPwm2Regs.CMPA.half.CMAHR register.

The clock on the oscilloscope is still 100k with 400 ticks.

Do I have to change anything in the PWM_CNF file?

Sincerely,

Jaspreet

0 Brett Larimore over 12 years ago in reply to Jaspreet Kaur Mann

TI__Guru 57255 points

Jaspreet,

The CMPA setting in my watch window is the non-HR version of CMPA.

What is your EPwm2Regs.CMPA.half.CMPA equal to? Can you try setting it to 100 in your watch window?

Thank you,
Brett

0 Jaspreet Kaur Mann over 12 years ago in reply to Brett Larimore

Intellectual 625 points

Brett,

Perfect ! I didn't recognised the duty cycle is set to 0%.

Thanks you.

Sincerely,

Jaspreet

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PWM clock