How to set the PWM frequency to more than 400kHz with TMDSHVBLPFCKIT (bridgeless PFC developer’s kit), TMS320F28035? Thanks a lot for any of your help in advance.
(1) How can I set the PWM frequency of more than 400kHz in build 3?
[File] ..\TI\controlSUITE\development_kits\BLPFC_v1.0\BLPFC\BridgelessPFC-Main.c
- The BLPFC works at the PWM frequency of 200kHz (up-down count mode), which is defined as follows:
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#define period 300 //300 cycles -> 200KHz @60MHz CPU
EPwm7Regs.TBPRD = 3000; // Set timer period 3000 TBCLKs
EPwm1Regs.CMPB = 80; // ISR trigger point
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- In order to change the PWM frequency to 400kHz. I have modified the timer period and trigger point as:
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#define period 150 //150 cycles -> 400KHz @60MHz CPU
EPwm7Regs.TBPRD = 1500; // Set timer period 1500 TBCLKs
EPwm1Regs.CMPB = 40; // ISR trigger point (nearly midpoint during up count)
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- to execute in build 1(open loop check), duty at PWM frequency of 400kHz is outputted. However, when to run the kit in build 3 (complete voltage and current loop control), duty is not outputted and the output voltage is just equal to the input voltage instead of 400V.
(2) By the way, there are 2 switches of the BLPFC kit. When Q1 is PWM controlled, Q2 is forced high during the positive cycle (line-to-neutral voltage >0). I cannot understand how the values 80, 144 and 160 below are determined. Do they have any connection with the period 300. Does the value 80 here happen to be the same as CMPB? In order to output PWM frequency of 400kHz, do I have to change these values correspondingly.
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MOV @_EPwm1Regs.AQCTLA, #144 ; SET ePWM1 on CompA-Down, CLEAR CompA-Up (enable switching)
MOV @_EPwm2Regs.AQCTLA, #80 ; CLEAR ePWM2 on CompA-Up/Down (force low)
MOV @_EPwm2Regs.AQCTLA, #160 ; SET ePWM2 on CompA-Up/Down (force high)
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[file] ..\TI\controlSUITE\development_kits\BLPFC_v1.0\BLPFC\BridgelessPFC-DPL-ISR.asm
;Calculate Vrect
MOVW DP, #_AdcResult ; load Data Page to read ADC results
MOV ACC, @_AdcResult.ADCRESULT3<<12 ; ACC = Line
SUB ACC, @_AdcResult.ADCRESULT4<<12 ; ACC = Line - Neutral
B NegativeCycle, LEQ ; Branch to Negative Half Cycle
PositiveCycle:
; Save Vrect
.ref _Vrect
MOVW DP, #_Vrect
MOVL @_Vrect, ACC
; ePWM1 & ADC configuration
MOVW DP, #_AdcRegs.ADCSOC1CTL ; load Data Page to read ADC results
; MOV @_AdcRegs.ADCSOC1CTL.bit.CHSEL, #2 ; Switch ADC to IpfcA current
EALLOW
MOV @_AdcRegs.ADCSOC1CTL, #10374 ; Switch ADC to IpfcA current
EDIS
MOVW DP, #_EPwm1Regs.AQCTLA ; load Data Page to read ePWM registers
; MOV @_EPwm1Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM1 on CompA-Up (enable switching)
; MOV @_EPwm1Regs.AQCTLA.bit.CAD, #2 ; SET ePWM1 on CompA-Down (enable switching)
MOV @_EPwm1Regs.AQCTLA, #144 ; SET ePWM1 on CompA-Down, CLEAR CompA-Up (enable switching)
MOVW DP, #_EPwm2Regs.AQCTLA ; load Data Page to read ePWM registers
; MOV @_EPwm2Regs.AQCTLA.bit.CAU, #1 ; CLEAR ePWM2 on CompA-Up
; MOV @_EPwm2Regs.AQCTLA.bit.CAD, #1 ; CLEAR ePWM2 on CompA-Down (force low)
MOV @_EPwm2Regs.AQCTLA, #80 ; CLEAR ePWM2 on CompA-Up/Down (force low)
; Check if near Zero crossing before forcing ePWM2 High
;SUB ACC, #100<<12
SUB ACC, #50<<12
B SkipPWM2Force, LT
; MOV @_EPwm2Regs.AQCTLA.bit.CAU, #2 ; SET ePWM2 on CompA-Up (force high)
; MOV @_EPwm2Regs.AQCTLA.bit.CAD, #2 ; SET ePWM2 on CompA-Down
MOV @_EPwm2Regs.AQCTLA, #160 ; SET ePWM2 on CompA-Up/Down (force high)
SkipPWM2Force:
; MOVW DP, #_GpioDataRegs.GPADAT ; load Data Page to read GPIO registers
; MOV @_GpioDataRegs.GPASET, #128 ; Set GPIO7, Used for debug purposes
B ControlLoopEnd, UNC
