Other Parts Discussed in Thread: TMS320F28377S
Hi,
I am facing problems with the ePWM9 (and also 10 & 11) in LAUNCHXL-F28377S board. Since TMS320F28377S that is available with the Launchpad is a 100-pin PZP pack, to use the ePWM9 module, I have utilized GPIO16 and GPIO17 instead of GPIO161 and GPIO162, respectively that is specified in the F2837xS_EPwm.c
To implement this I have made corresponding changes in GPAGMUX2 and GPAMUX2 registers as per the pin multiplexing specified in http://www.ti.com/lit/ds/sprs881b/sprs881b.pdf
Now, the ePWM 6, 7 & 8 works perfectly. But, I am not able to get the ePWM 9 (10 & 11) to work in a similar manner.
This is the code that I have implemented.
#include "F28x_Project.h" // Device Headerfile and Examples Include File
void Setup_ePWM6789(void);
void main(void)
{
//--- CPU Initialization
InitSysCtrl(); // Initialize the CPU (FILE: SysCtrl.c)
InitGpio(); // Initialize the shared GPIO pins (FILE: Gpio.c)
InitPieCtrl(); // Initialize and enable the PIE (FILE: PieCtrl.c)
IER = 0x0000;
IFR = 0x0000;
Setup_ePWM6789();
//--- Enable global interrupts
asm(" CLRC INTM, DBGM"); // Enable global interrupts and realtime debug
//--- Main Loop
while(1) // endless loop - wait for an interrupt
{
asm(" NOP");
}
} //end of main()
void Setup_ePWM6789()
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pullup on GPIO10
GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pullup on GPIO11
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // GPIO10 = PWM6A
GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1; // GPIO11 = PWM6B
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pullup on GPIO12
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pullup on GPIO13
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1; // GPIO10 = PWM7A
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1; // GPIO11 = PWM7B
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pullup on GPIO2
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pullup on GPIO3
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1; // GPIO14 = PWM8A
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1; // GPIO15 = PWM8B
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pullup on GPIO2
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pullup on GPIO3
GpioCtrlRegs.GPAGMUX2.bit.GPIO16 = 1; // GPIO16 = PWM9A
GpioCtrlRegs.GPAGMUX2.bit.GPIO17 = 1; // GPIO17 = PWM9B
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // GPIO16 = PWM9A
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // GPIO17 = PWM9B
EDIS;
// Setup TBCLK
EPwm6Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // HSPCLKDIV = 1
EPwm6Regs.TBCTL.bit.CLKDIV = TB_DIV1; // CLKDIV = 1
EPwm6Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up down
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // HSPCLKDIV = 1
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1; // CLKDIV = 1
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up down
EPwm8Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // HSPCLKDIV = 1
EPwm8Regs.TBCTL.bit.CLKDIV = TB_DIV1; // CLKDIV = 1
EPwm8Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up down
EPwm9Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // HSPCLKDIV = 1
EPwm9Regs.TBCTL.bit.CLKDIV = TB_DIV1; // CLKDIV = 1
EPwm9Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up down
EPwm6Regs.TBPRD = 6250; // Set timer period
EPwm6Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm6Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm6Regs.TBCTR = 0x0000; // Clear counter
EPwm7Regs.TBPRD = 6250; // Set timer period
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
EPwm8Regs.TBPRD = 6250; // Set timer period
EPwm8Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm8Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm8Regs.TBCTR = 0x0000; // Clear counter
EPwm9Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm9Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm9Regs.TBCTR = 0x0000; // Clear counter
// Set Compare values
EPwm6Regs.CMPA.bit.CMPA = 6250/2; // Initial compare A value
EPwm6Regs.CMPB.bit.CMPB = 6250/2; // Initial Compare B value
EPwm7Regs.CMPA.bit.CMPA = 6250/2; // Initial compare A value
EPwm7Regs.CMPB.bit.CMPB = 6250/2; // Initial Compare B value
EPwm8Regs.CMPA.bit.CMPA = 6250/2; // Initial compare A value
EPwm8Regs.CMPB.bit.CMPB = 6250/2; // Initial Compare B value
EPwm9Regs.CMPA.bit.CMPA = 6250/2; // Initial compare A value
EPwm9Regs.CMPB.bit.CMPB = 6250/2; // Initial Compare B value
// Set actions
EPwm6Regs.AQCTLA.bit.CAD = AQ_SET; // Set PWM2A on on event A, down count
EPwm6Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM2A on event A, up count
EPwm7Regs.AQCTLA.bit.CAD = AQ_SET; // Set PWM2A on on event A, down count
EPwm7Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM2A on event A, up count
EPwm8Regs.AQCTLA.bit.CAD = AQ_SET; // Set PWM2A on on event A, down count
EPwm8Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM2A on event A, up count
EPwm9Regs.AQCTLA.bit.CAD = AQ_SET; // Set PWM2A on on event A, down count
EPwm9Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM2A on event A, up count
EPwm6Regs.AQCTLB.bit.CBD = AQ_SET; // Set PWM2B on event B, down count
EPwm6Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM2B on event B, up count
EPwm7Regs.AQCTLB.bit.CBD = AQ_SET; // Set PWM2B on event B, down count
EPwm7Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM2B on event B, up count
EPwm8Regs.AQCTLB.bit.CBD = AQ_SET; // Set PWM2B on event B, down count
EPwm8Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM2B on event B, up count
EPwm9Regs.AQCTLB.bit.CBD = AQ_SET; // Set PWM2B on event B, down count
EPwm9Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM2B on event B, up count
}
/*** end of file *****************************************************/
Is there anything that I have missed?
