On the 28377D or 28375D, the datasheet shows 24 inputs for the ADC. However the documentation for these partrs only shows 16 ADC inputs for the ADCA-D modules it only has 16 SOCs... and a 16 input MUX..
While I can see the pattern, and 'ASSUME' I would do things like :
AdcaRegs.ADCSOC#CTL.bit.CHSEL = ?? etc...
AdcbRegs.ADCSOC#CTL.bit.CHSEL = ??
where # would be 0-23
This means that various registers in the documentation are invalid... because they only support up to 16... so where is the updated documentation regarding the 24 ADCs? is there an errata or other amendum section that just states what changes you made where to support this? Thanks.
I have to be sure I'm programming/setting up the ADCs correctly, and have to be sure that they all interface with the CLA etc... I assume the round robin/high prioritys are set the same, but now accept up to 24 inputs... If you could clarify changes for the 24 inputs that would be appreciated.
Thanks.