Clarification on F28M36x internal SPI FIFO behavior

Other Parts Discussed in Thread: CONTROLSUITE

Hello everyone,

I am observing some weird behavior on my Concerto F28M36x controlCARD.

I am implementing a SPI interface between the two cores using the SSI3 as master and SPI-A as slave. I am using the driverlib functions from controlSUITE v208.

I successfully send data from the SSI3 to SPI-A by doing sequentially:

while(SSIBusy(SSI3_BASE));

SSIDataPut(...);

SSIDataGet(...);

The odd thing is that it works even when the C28x execution is suspended from the debugger... in SSIDataGet() the flag RNE from the register SSISR is set. The data to be read has the value 0... Is this an expected behavior ?

Thanks,