I am using Sigma Delta Modulator 1304M25 and related digital filter SDFM from TMS320F28377S to measure the currents/ voltages of inverter in automotive applications.
The TI example that i used for this is controlsuite\...\sdfm_sync_cpu_cpu01 with following settings
Input control Mode: Mode0
Comparator: COSR_32, Sinc3
Data Filter channel 1: DOSR_256, Sinc3, Data output 16-Bit, Shift Bits_9
Interrupts Activated: MFIE (modulator clock Fail), AFx (Filter Acknowledge interrupts), Under-Current Threshold ( IEL ), Over-Current Threshold ( IEH )
External Filter Reset (FILRES): Disabled, Filter Data Rate = Modulator Data Rate (10Mhz) / DOSR (256) = 39,1KSPS and Latency = SINC3 / Filter Data Rate = 76,8uS
Clock Frequency: 10Mhz, Same clock signal feeds SDFM and SD-Modulator
Modulator Data update on each CLK falling edge.
SDFM data strobing at each CLK rising edge.
SDFM ISR Routine reads data on each Acknowledge Interrupt.
1) I want to know the permitted frequency range of analog input AINP, AINN to delta sigma modulator? I am getting a nice Sine wave at Filter output with analog input having frequency 1KHz, but as soon as I increase the analog input signal freuqncy from 1 KHz to 5 KHz or 10KHz, the results get worse and I can't see a sine wave anymore. I tried increasing Clock frequency to 20MHz but it didn't help. Could someone please tell me where do I stilll lack?
Below both of outputs at input frequency of 1KHz and 10KHz
a) Analog signal: Vpp 100mV, 1 KHz, CLK 10 MHz
b) Analog Signal: 100mV Vpp, Input Frequency 10KHz, Clock 20MHz
Thank you for your help in advance.