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CCS/TMS320F28027: FOR ADC CONFIGURATION

Part Number: TMS320F28027
Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: Code Composer Studio

Hello,

I am a newbie in microcontrollers. I am trying to write a code for driving 2 PWMS with 180 phase shift and a dead band between them. I got stuck at one point. my main requirement is

" start of ADC Conversion can be triggered at an appropriate time in every half PWM switching cycle ". to achieve this, what should I do?

I am including adc part of my code. please tell me what other changes I have to make in my code to achieve the above requirement.

Thank you

  ADC_setIntPulseGenMode(myAdc, ADC_IntPulseGenMode_Prior);               //ADCINT1 trips after AdcResults latch
        ADC_enableInt(myAdc, ADC_IntNumber_1);                                  //Enabled ADCINT1
        ADC_setIntMode(myAdc, ADC_IntNumber_1, ADC_IntMode_ClearFlag);          //Disable ADCINT1 Continuous mode
        ADC_setIntSrc(myAdc, ADC_IntNumber_1, ADC_IntSrc_EOC2);                 //setup EOC2 to trigger ADCINT1 to fire
        ADC_setSocChanNumber (myAdc, ADC_SocNumber_0, ADC_SocChanNumber_A4);    //set SOC0 channel select to ADCINA4
        ADC_setSocChanNumber (myAdc, ADC_SocNumber_1, ADC_SocChanNumber_A4);    //set SOC1 channel select to ADCINA4
        ADC_setSocChanNumber (myAdc, ADC_SocNumber_2, ADC_SocChanNumber_A2);    //set SOC2 channel select to ADCINA2
        ADC_setSocTrigSrc(myAdc, ADC_SocNumber_0, ADC_SocTrigSrc_EPWM2_ADCSOCA);    //set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1
        ADC_setSocTrigSrc(myAdc, ADC_SocNumber_1, ADC_SocTrigSrc_EPWM2_ADCSOCA);    //set SOC1 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1
        ADC_setSocTrigSrc(myAdc, ADC_SocNumber_2, ADC_SocTrigSrc_EPWM2_ADCSOCA);    //set SOC2 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1, then SOC2

        ADC_setSocSampleWindow(myAdc, ADC_SocNumber_0, ADC_SocSampleWindow_7_cycles);   //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
        ADC_setSocSampleWindow(myAdc, ADC_SocNumber_1, ADC_SocSampleWindow_7_cycles);   //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
        ADC_setSocSampleWindow(myAdc, ADC_SocNumber_2, ADC_SocSampleWindow_7_cycles);   //set SOC2 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)

    // Enable PWM clock
    CLK_enablePwmClock(myClk, PWM_Number_2);
    CLK_enablePwmClock(myClk, PWM_Number_1);

    // Setup PWM
    PWM_enableSocAPulse(myPwm2);
    PWM_enableSocAPulse(myPwm1);
    // Enable SOC on A group
    PWM_setSocAPulseSrc(myPwm2, PWM_SocPulseSrc_CounterEqualCmpAIncr);
    PWM_setSocAPulseSrc(myPwm1, PWM_SocPulseSrc_CounterEqualCmpAIncr);// Select SOC from from CPMA on upcount
    PWM_setSocAPeriod(myPwm2, PWM_SocPeriod_FirstEvent);
    PWM_setSocAPeriod(myPwm1, PWM_SocPeriod_FirstEvent); // Generate pulse on 1st event
    //PWM_setCmpA(myPwm2, 0x0000);                                         // Set compare A value
    //PWM_setPeriod(myPwm2, 0x05DC);
    //PWM_setPeriod(myPwm1, 0x05DC);     // Period = 1500 for 20Khz Sampling Frequency
    PWM_setCounterMode(myPwm2, PWM_CounterMode_Up);
    PWM_setCounterMode(myPwm1, PWM_CounterMode_Up);
    PWM_enableDeadBandHalfCycle(myPwm2);
   PWM_getDeadBandFallingEdgeDelay(myPwm1);
   PWM_getDeadBandRisingEdgeDelay(myPwm1);
   PWM_setDeadBandInputMode(myPwm1,3);
    PWM_setDeadBandPolarity(myPwm1,3);
    PWM_setDeadBandRisingEdgeDelay(myPwm1,31.25);
    PWM_setDeadBandFallingEdgeDelay(myPwm1,31.25);
   // PWM_setChoppingPulseWidth(myPwm1,50);
    CLK_enableTbClockSync(myClk);

  • Hi Madhuri,

    Madhuri Depuru said:
    " start of ADC Conversion can be triggered at an appropriate time in every half PWM switching cycle ". to achieve this, what should I do?

    Refer this code: C:\ti\controlSUITE\device_support\f2802x\v230\f2802x_examples_structs\adc_soc

    In the above code, you can set the CMPA value to half of TBPRD value to ensurewhat you require.

    Regards,

    Gautam

  • Madhuri,
    Were you able to work through this problem?

    A common suggestion to help with this issue is to configure a spare PWM further down in the sync chain with twice the frequency. You can then use the faster signal to trigger SOCs for your ADC. You need to sync from the slowest signal. If you do not, you will re-sync over and over before the period of the slowest signal finishes.

    Regards,
    Cody